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ICS9FG107 датащи(PDF) 3 Page - Integrated Circuit Systems

номер детали ICS9FG107
подробное описание детали  Programmable FTG for Differential CPU, PCI Express & SATA Clocks
PDF  14 Pages
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производитель  ICST [Integrated Circuit Systems]
домашняя страница  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS9FG107 датащи(HTML) 3 Page - Integrated Circuit Systems

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3
Integrated
Circuit
Systems, Inc.
ICS9FG107
0863C—11/22/04
Pin Description (Continued)
PIN
#
PIN NAME
PIN TYPE
DESCRIPTION
25
DIF_STOP#
IN
Active low input to stop differential output clocks.
26
*SPREAD
IN
Asynchronous, active high input, with internal 120Kohm pull-up
resistor, to enable spread spectrum functionality.
27
**SEL14M_25M#
IN
Select 14.31818 MHz or 25 Mhz input frequency. 1 = 14.31818 MHz,
0 = 25 MHz
28
*OE_3
IN
Active high input for enabling outputs.
0 = tri-state outputs, 1= enable outputs
29
DIF_3#
OUT
0.7V differential complement clock outputs
30
DIF_3
OUT
0.7V differential true clock outputs
31
VDD
PWR
Power supply, nominal 3.3V
32
DIF_2#
OUT
0.7V differential complement clock outputs
33
DIF_2
OUT
0.7V differential true clock outputs
34
**OE_2
IN
Active high input for enabling outputs.
0 = tri-state outputs, 1= enable outputs
35
GND
PWR
Ground pin.
36
VDD
PWR
Power supply, nominal 3.3V
37
**OE_1
IN
Active high input for enabling outputs.
0 = tri-state outputs, 1= enable outputs
38
DIF_1#
OUT
0.7V differential complement clock outputs
39
DIF_1
OUT
0.7V differential true clock outputs
40
VDD
PWR
Power supply, nominal 3.3V
41
DIF_0#
OUT
0.7V differential complement clock outputs
42
DIF_0
OUT
0.7V differential true clock outputs
43
*OE_0
IN
Active high input for enabling outputs.
0 = tri-state outputs, 1= enable outputs
44
**FS1
I/O
Frequency select latch input pin / 3.3V 66.66MHz clock output.
45
*DWNSPRD#
IN
3.3V input that selects spread mode. This input is not latched at
power up.
0 = Down Spread, 1 = Center Spread
46
IREF
OUT
This pin establishes the reference current for the differential current-
mode output pairs. This pin requires a fixed precision resistor tied to
ground in order to establish the appropriate current. 475 ohms is the
standard value.
47
GNDA
PWR
Ground pin for the PLL core.
48
VDDA
PWR
3.3V power for the PLL core.
Pins preceeded by * have 120 Kohm pull DOWN resistors
Pins preceeded by ** have 120 Kohm pull UP resistors



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