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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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L9945 датащи(PDF) 113 Page - STMicroelectronics |
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L9945 датащи(HTML) 113 Page - STMicroelectronics |
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113 / 151 page  RESPONSE 12 Frame partitioning 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 C FIXED_PATTERN PUPD8 PUPD7 PUPD6 PUPD5 Description: Channel 5-8 control signal integrity Reset 0xCABE0001 [31:28] C: Response to command 12 Reset: 1100 Reset Condition: - [27] R/W: Bit to read/write configuration 0: Write & request read 1: Request read only Reset: 1 Reset Condition: POR, NRES [26:21] FIXED_PATTERN: Fixed pattern Reset: 010101 Reset Condition: POR, NRES [20:17] V8…5: This bit monitors the external FET drain voltage by exploiting the internal diagnostic comparators. It is useful for obtaining the status of the output during normal operation The value of this bit depends on the channel configuration: 0: Drain voltage low (VDRAIN < VLVT) -> transistor ON 1: Drain voltage high (VDRAIN > VLVT) -> transistor OFF (Low-Side with NFET) 0: Drain voltage low (VDRAIN < VOL) -> transistor OFF 1: Drain voltage high (VDRAIN > VOL) -> transistor ON (High-Side with NFET/PFET) Reset: 1111 Reset Condition: POR, NRES [16:13] C8…5: This bit combines the control signals SPI_ON_OUTxx, NONx and SPI_input_sel_xx to determine if the x-th channel is commanded ON or OFF 0: output commanded OFF 1: output commanded ON Reset: 0000 Reset Condition: POR, NRES L9945 SPI MOSI/MISO list DS12275 - Rev 8 page 113/151 |
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