1

Introduction

1.1

Document overview

This document provides a summary of the target specification and features of the SR6P7C8, SR6P7C4 devices.

For detailed information, refer to the device Datasheet and device Reference manual.

Note:

technical reference manuals, available from the www.arm.com website.

Note:

Arm is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere.

1.2

Description

Stellar integration MCUs have been designed to meet the requirements of domain controllers and ECUs with

high integration requested in the architectures of connected update-able automated and electrified cars. They

have superior real-time and safe performance (with highest ASIL-D capability). Bringing HW based virtualization

technology to MCUs, they ease the development and integration of multiple source SW onto the same HW while

maximizing the resulting SW performance. They offer high efficiency OTA reprogramming capability with fast new

image download and activation at almost no memory overhead thanks to SR6 unique built-in dual image storage

tailored to OTA reprogramming needs and provide high speed security cryptographic services, for instance for

network authentication.

Feature

SR6P7C8, SR6P7C4

‑R52+ cores (+ checker cores)

6 cores (+4 checkers), configurable as 5

cores (+5 checkers)

NEON (with SIMD, dual precision floating point)

2

Cache (instruction / data) per core in Kbyte

32 / 32

Core memory protection unit (regions),

several additional protection mechanisms in

the architecture, for example: NOC firewalls

Hypervisor (EL2)

24

OS (EL1)

24

Code NVM

Overall including HSM in Mbyte

20

Cluster code NVM in Mbyte

19.5

HSM code NVM in Kbyte

512

Code NVM built-in memory replication for OTA reprogramming (not supported by

HSM) in Mbyte

Up to 2x 19.5

Data NVM in Kbyte

640

RAM in Kbyte

8400

Yes

AES-Light (cryptographic services - in lockstep)

4

‑M4

Multi-purpose accelerator (DSPH)

1

Multi-purpose accelerator in lockstep (DME)

1

Stand-by and smart power modes

No

eDMA engines (number of channels, more

channels through muxes/channel)

Engine

4

Channel

3 x 32

1 x 64

LIN and UART (LINFlexD)

11

CAN-FD

12

SR6P7C8, SR6P7C4

Introduction

DB4504 - Rev 5

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