 |
поискавой системы для электроныых деталей |
|
|
поискавой системы для электроныых деталей |
|
PCMD3140 датащи(PDF) 52 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
PCMD3140 датащи(HTML) 52 Page - Texas Instruments |
|
|
52 / 111 page  7.5.1.1.2.2 I2C Multiple-Byte Write As shown in Figure 7-65, a multiple-byte data write transfer is identical to a single-byte data write transfer except that multiple data bytes are transmitted by the controller device to the target device. After receiving each data byte, the device responds with an acknowledge bit (ACK). Finally, the controller device transmits a stop condition after the last data-byte write transfer. Register Figure 7-65. I2C Multiple-Byte Write Transfer 7.5.1.1.2.3 I2C Single-Byte Read As shown in Figure 7-66, a single-byte data read transfer begins with the controller device transmitting a start condition followed by the I2C target address and the read/write bit. For the data read transfer, both a write followed by a read are done. Initially, a write is done to transfer the address byte of the internal register address to be read. As a result, the read/write bit is set to 0. After receiving the target address and the read/write bit, the device responds with an acknowledge bit (ACK). The controller device then sends the internal register address byte, after which the device issues an acknowledge bit (ACK). The controller device transmits another start condition followed by the target address and the read/write bit again. This time, the read/write bit is set to 1, indicating a read transfer. Next, the device transmits the data byte from the register address being read. After receiving the data byte, the controller device transmits a not-acknowledge (NACK) followed by a stop condition to complete the single-byte data read transfer. A6 A5 A0 R/W ACK A7 A6 A5 A4 A0 ACK A6 A5 A0 ACK Start Condition Stop Condition Acknowledge Acknowledge Acknowledge I2CDeviceAddressand Read/WriteBit Register DataByte D7 D6 D1 D0 ACK I2CDeviceAddressand Read/WriteBit Not Acknowledge R/W A1 A1 RepeatStart Condition Figure 7-66. I2C Single-Byte Read Transfer 7.5.1.1.2.4 I2C Multiple-Byte Read As shown in Figure 7-67, a multiple-byte data read transfer is identical to a single-byte data read transfer except that multiple data bytes are transmitted by the device to the controller device. With the exception of the last data byte, the controller device responds with an acknowledge bit after receiving each data byte. After receiving the last data byte, the controller device transmits a not-acknowledge (NACK) followed by a stop condition to complete the data read transfer. A6 A0 ACK Acknowledge I2CDeviceAddressand Read/WriteBit R/W A6 A0 R/W ACK A0 ACK D7 D0 ACK Start Condition Stop Condition Acknowledge Acknowledge Acknowledge LastDataByte ACK FirstDataByte RepeatStart Condition Not Acknowledge I2CDeviceAddressand Read/WriteBit Register OtherDataBytes A7 A6 A5 D7 D0 ACK Acknowledge D7 D0 Figure 7-67. I2C Multiple-Byte Read Transfer PCMD3140-Q1 SBASAH3A – APRIL 2022 – REVISED SEPTEMBER 2022 www.ti.com 52 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: PCMD3140-Q1 |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
