DS11777 Rev 4

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STA8089GAT

Electrical characteristics

32

4.7

DC characteristics

Table 13 specifies the LDO1 voltage regulator characteristics.

Table 14 specifies the LDO2 voltage regulator characteristics.

Table 15 specifies the low voltage detection thresholds

Table 16 lists the DC characteristics for all the IO digital buffers except for the following input

buffers: STBYn (24), STDBY_OUT (23), WAKEUP (26), TRSTn (3) and RSTn (25).

Table 13. LDO1 DC characteristics

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

VOL1

Output voltage (1.2 V)

1.71 V ≤ VINL1 ≤ 1.89 V;

IOL1 ≤70mA

1.1

1.20

1.32

V

IOL1

Output current

0

—

70

mA

Table 14. LDO2 DC characteristics

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

VOL2

Output voltage

1.6 V ≤ VINL2 ≤4.3 V;

IOL2 ≤30 mA

1.08

1.20

1.32

V

IOL2

Output current

0

—

30

mA

Table 15. Low voltage detection thresholds

Parameter

Min.

Typ.

Max.

Unit

Input LVD always on

and main VRs(1)

1. Non tested in production.

Upper voltage threshold

—

1.680

—

V

Lower voltage threshold

—

1.650

—

V

Output LVD always

on VR(1)

Upper voltage threshold

—

0.995

—

V

Lower voltage threshold

—

0.935

—

V

Output LVD main VR

(1)

Upper voltage threshold @ VOLM = 1.2 V

—

1.142

—

V

Lower voltage threshold @ VOLM = 1.2 V

—

1.076

—

V

Table 16. I/O buffers DC characteristics

Symbol

Parameter

Test

conditions

Min.

Typ.

Max.

Unit

VIL(1)

Logical input low level voltage

VDDIO = 1.8 V

-0.3

—

0.3 * VDDIO

V

VDDIO = 3.3V

-0.3

—

0.8

V

VIH(1)

Logical input high level

voltage

VDDIO = 1.8 V

0.7 * VDDIO

—VDDIO + 0.3

V

VDDIO = 3.3V

2.0

—

VDDIO + 0.3

V

VHYST(2) Schmitt-trigger hysteresis

–

50

—

mV