SPSB0815 datasheet(51/135 Pages) STMICROELECTRONICS

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4.3.2

Device application registers (RAM)

The device application registers are all registers accessible using OpCode ‘00’, ‘01’ and ‘10’. The functions of

these registers are defined in the device specification.

4.4

Protocol failure detection

To realize a protocol, which covers certain fail-safe requirements a basic set of failure detection mechanisms are

implemented.

4.4.1

Clock monitor

During communication (CSN low to high phase) a clock monitor counts the valid SCK clock edges. If the SCK

edges do not correlate with the SPI data length, an SPIE is reported with the next command and the actual

communication is rejected.

By accessing the device information registers (OpCode = ‘11’) the clock monitor is set to a minimum of 16 SCK

edges plus a multiple by 8 (for example, 16, 24, 32, …).

Providing no SCK edge during a CSN low to high phase is not recognized as an SPIE. For a SPI burst read also

the SPI data length plus multiple numbers of payloads SCK edges are assumed as a valid communication.

4.4.2

SCK polarity (CPOL) check

To detect the wrong polarity access via SCK, the internal clock monitor is used. Providing first a negative edge on

SCK during communication (CSN low to high phase) or a positive edge at last will lead to an SPI error reported in

the next communication and the actual data is rejected.

4.4.3

SCK phase (CPHA) check

To verify, that the SCK phase of the SPI master is set correctly a special device information register is

implemented. By reading this register the data must be 55H. In case AAH is read the CPHA setting of the

SPI master is wrong and a proper communication cannot be guaranteed.

4.4.4

CSN timeout

By pulling CSN low the SDO is set active and leaves its tristate condition. To ensure communication between

other SPI devices within the same bus even in case of CSN stuck @ low a CSN timeout is implemented. By

pulling CSN low an internal timer is started. After timer end is reached the actual communication is rejected and

the SDO is set to tristate condition.

4.4.5

SDI stuck at GND

As a communication with data all-‘0’ and OpCode ‘00’ on address b’000000 cannot be distinguished between a

valid command and a SDI stuck @ GND this communication is not allowed. Nevertheless, in case a stuck @ GND

is detected the communication will be rejected and the SPIE will be set with the next communication.

4.4.6

SDI stuck at HIGH

As a communication with data all-‘1’ and OpCode ‘11’ on address b’111111 cannot be distinguished between a

valid command and a SDI stuck @ HIGH this communication is not allowed. In case a stuck @ HIGH is detected

the communication will be rejected and the SPIE will be set with the next communication.

4.4.7

SDO stuck @

The SDO stuck @ GND and stuck @ HIGH has to be detected by the SPI master. As the definition of the GSB

guarantees at least one toggle, a GSB with all-‘0’ or all –‘1’ reports a stuck at error.

SPSB081

Protocol failure detection

DS14048 - Rev 1

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