General description

STA8089FGA

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DocID029680 Rev 2

x 16 KB; DTCM can be configured as 128 + Nd x 16 KB, where Ni + Nd = 8, Ni

 1.

3.3.1

AHB slaves



G3 APB port that allows to interface with the G3BB acquisition memory and control

registers.



512 Kbytes ROM



Vectored Interrupt Controller (VIC).



SQI flash memory controller



3 x ARM946 APB peripheral bus (APB1, APB2, APB3).

Vectored Interrupt Controller (VIC)

This Vectored Interrupt Controller (VIC) allows the operative system interrupt handler to

quickly dispatch interrupt service routines in response to peripheral interrupts. It provides a

software interface to the interrupt system. There are up to 64 interrupt lines. The VIC uses a

bit position for each different interrupt source.

The software can control each request line to generate software interrupts. Each interrupt

line can be independently enabled and configured to trigger a non-vectored Normal Interrupt

Request (IRQ) or Fast Interrupt Request (FIQ) to the ARM946 CPU. Sixteen interrupt lines

can also be selected to trigger a vectored IRQ.

The VIC has two operation modes: the user mode and the privilege mode, in order to have

the possibility to set (or not) one level of protection during execution.

FS USB device controller

Full speed USB device with transceiver. It is an AHB slave. When active requires a 48 MHz

clock XTAL_IN.

Table 7. TCM Configuration

TCMcfg [2]

TCMcfg [1]

TCMcfg [0]

ITCM

DTCM

000

16 KB

240 KB

001

32 KB

224 KB

010

48 KB

208 KB

011

64 KB

192 KB

100

80 KB

176 KB

101

96 KB

160 KB

110

112 KB

144 KB

1

1

1

128 KB

128 KB