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L9374TRLF датащи(PDF) 45 Page - STMicroelectronics |
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L9374TRLF датащи(HTML) 45 Page - STMicroelectronics |
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45 / 80 page ![]() DocID025414 Rev 1 45/80 L9374LF Circuit description 79 4.8.8 SPI-failure There are 3 possible SPI-failures: parity failure (PARITY_F) clock failure (SPICLK_F) data failure (DATA_F) In case of any SPI-Failure the next transmission to the master contains the following data: Parity failure: A parity failure is detected if the total number of '1's in the message is not odd. The PARITY_F bit of status register 0 is set and master message is ignored (no change of the data). The corresponding status message returned to the master after a parity failure contains the received address and only ‘1’s for the data bits. The PARITY_F bit can be cleared by accessing address 0. SPI clock failure: The L9375 counts the number of SPICLK positive edges during SPICS actuations (SPICS=’0’). If this number is unequal to 16 an error is detected and the message is not used (no change of the data) and the SPICLK_F bit in the status address 0 is set. The corresponding status message returned to the master after a Clock failure contains the received address and only ‘1’s for the data bits. The SPICLK_F bit can be cleared by accessing address 0. Data failure: A SPI command with data content that is not allowed produces a data failure (DATA_F). The Data_F bit in the SPI status register 0 is set if the master writes invalid data to the config-registers (address 2, 14 and 15). When this failure occurs all data in these addresses are not modified (no change in the content at these registers).The Data_F bit can be cleared by accessing address 0. 4.8.9 CLKIN-failure CLKIN-failure (CLKIN_F) is detected if the input frequency (Table 17) at the CLKIN pin is out of the specified range for tCLK_F.(Table 18). Once this failure is detected all outputs are switched off immediately, all set points, control variables, and counters are reset to zero and the sync_counter is set to one. This frequency is monitored by an internal oscillator. This oscillator used to clock all internal nodes otherwise driven by CLKIN. All failures which occur due to a CLKIN-failure are not reflected in any SPI-register. Only a sync failure will be reflected. Failures which occurred prior to a CLKIN failure are not deleted or overwritten. The CLKIN_F bit can be cleared by accessing address 0 once the failure is removed. MSB LSB received address 11111111111 Parit y A3 A2 A1 A0 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 P |
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