AM6546 datasheet(261/284 Pages) TI

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9 Applications, Implementation, and Layout

Note

Information in the following applications sections is not part of the TI component specification,

and TI does not warrant its accuracy or completeness. TI’s customers are responsible for

determining suitability of components for their purposes. Customers should validate and test design

implementation to confirm system functionality.

9.1 Device Connection and Layout Fundamentals

9.1.1 Power Supply Decoupling and Bulk Capacitors

9.1.1.1 Power Distribution Network Implementation Guidance

The Sitara™ Processor Power Distribution Networks: Implementation and Analysis provides guidance for

successful implementation of the power distribution network. This includes PCB stackup guidance as well as

guidance for optimizing the selection and placement of the decoupling capacitors. TI supports only designs that

follow the board design guidelines contained in the application report.

9.1.2 External Oscillator

For more information, see Section 7.9.4.1, Input Clocks / Oscillators.

9.1.3 JTAG and EMU

Texas Instruments supports a variety of eXtended Development System (XDS) JTAG controllers with various

debug capabilities beyond only JTAG support. A summary of this information is available in the XDS Target

Connection Guide.

For more recommendations on EMU routing, see Emulation and Trace Headers Technical Reference Manual.

9.1.4 Reset

The device incorporates four external reset pins (MCU_PORz, MCU_RESETz, PORz, and RESETz) and four

reset status pins (MCU_PORz_OUT, MCU_RESETSTATz, PORz_OUT, and RESETSTATz). Additional reset

modes are available through internal registers and emulation.

The device integrates an on-chip Power-on-Reset (POR) generator. Additionally, this device supports an external

POR generation through a PORz and MCU_PORz input pin. The MCU_BYPASS_POR pin selects the POR

source. When the MCU_BYPASS_POR pin is set high at power-up, on-chip POR generation will be completely

bypassed and the external POR used. When it is low, the POR is generated internally. However, the four

external reset inputs must all be pulled high to enable this internal POR generation.

9.1.5 Unused Pins

For more information about Unused Pins, see Section 6.5, Connections for Unused Pins.

9.1.6 Hardware Design Guide for AM65x/DRA80xM Devices

The Hardware Design Guide for AM65x/DRA80xM Devices document describes hardware system design

considerations for the AM65x/DRA80xM family of processors.This design guideis intended to be used as an

aid during the development of application hardware.

www.ti.com

AM6548, AM6528, AM6546, AM6526

SPRSP52B – DECEMBER 2019 – REVISED JUNE 2021

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