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HT95C40P датащи(PDF) 20 Page - Holtek Semiconductor Inc |
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HT95C40P датащи(HTML) 20 Page - Holtek Semiconductor Inc |
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20 / 51 page ![]() HT95CXXX Rev. 1.50 20 May 26, 2005 Register Addr. Reset Conditions Power On RES Pin RES Pin (Sleep/Idle) WDT WDT (Sleep/Idle) PA 12H 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PAC 13H 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PB 14H 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PBC 15H 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu DialerIO 16H 111x xxxx 111x xxxx 111x xxxx 111x xxxx uuuu uuuu PD 18H 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PDC 19H 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PE 1AH ---- 1111 ---- 1111 ---- 1111 ---- 1111 ---- uuuu PEC 1BH ---- 1111 ---- 1111 ---- 1111 ---- 1111 ---- uuuu INTC1 1EH -000 -000 -000 -000 -000 -000 -000 -000 -uuu -uuu TBHP 1FH --xx xxx --uu uuuu --uu uuuu --uu uuuu --uu uuuu DTMFC 20H ---- -0-1 ---- -0-1 ---- -0-1 ---- -0-1 ---- -u-u DTMFD 21H 0000 0000 0000 0000 0000 0000 0000 0000 uuuu uuuu LINE 22H 0--- ---- u--- ---- u--- ---- u--- ---- u--- ---- RTCC 24H 0-0- ---- u-u- ---- u-u- ---- u-u- ---- u-u- ---- MODE 26H 000- ---- 00u- ---- 000- ---- 00u- ---- 000- ---- LCDIO 28H 000- ---- uuu- ---- uuu- ---- uuu- ---- uuu- ---- FSKC 29H --11 11-1 --11 11-1 --11 11-1 --11 11-1 --uu uu-u FSKS 2AH -x0- 1100 -x0- 1100 -x0- 1100 -x0- 1100 -xu- uuuu FSKD 2BH 0000 0000 0000 0000 0000 0000 0000 0000 uuuu uuuu LCDC 2DH 0000 -000 uuuu -uuu uuuu -uuu uuuu -uuu uuuu -uuu PFDC 2EH 0000 ---- 0000 ---- 0000 ---- 0000 ---- uuuu ---- PFDD 2FH 0000 0000 0000 0000 0000 0000 0000 0000 uuuu uuuu PF 34H 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PFC 35H 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PG 36H ---- 1111 ---- 1111 ---- 1111 ---- 1111 ---- uuuu PGC 37H ---- 1111 ---- 1111 ---- 1111 ---- 1111 ---- uuuu RAM (Data & LCD) x u u u u Note: ²u² means ²unchanged² ²x² means ²unknown² ²-² means ²unused² Timer/Event Counter Two timer/event counters (TMR0, TMR1) are imple- mented in the telephone controller series. The Timer/Event Counter 0 and Timer/Event Counter 1 con- tain 16-bits programmable count-up counter and the clock may come from an external or internal source. For TMR0, the internal source is the instruction clock (sys- tem clock/4). For TMR1, the internal source is 32768Hz. Using the 32768Hz clock or instruction clock, there is only one reference time-base. The external clock input allows the user to count external events, measure time intervals or pulse width, or generate an accurate time base. There are 3 registers related to the Timer/Event Counter 0; TMR0H, TMR0L and TMR0C. Writing TMR0L only writes the data into a low byte buffer, but writing TMR0H simultaneously writes the data along with the contents of the low byte buffer into the Timer/Event Counter 0 preload register (16-bit). The Timer/Event Counter 0 preload register is changed by writing TMR0H opera- tions. Writing TMR0L will keep the Timer/Event Counter 0 preload register unchanged. |
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