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HT1650 датащи(PDF) 11 Page - Holtek Semiconductor Inc |
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HT1650 датащи(HTML) 11 Page - Holtek Semiconductor Inc |
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11 / 18 page ![]() HT1650 Rev. 1.20 11 November 10, 2005 Bias Generator The HT1650 bias voltage belongs to the internal resistor type. It provides two kinds of bias options, namely 1/6 bias and 1/5 bias respectively. It also provides three kinds of bias current options by programming to suitably drive an LCD panel. The three kinds of bias current are large, middle, and small, respectively. Usually, large panel LCD can be excellently displayed by large bias current. Relatively, it consumes large current when LCD ON command is used. Small bias current provides low power consumption during on condition when the LCD is normally displayed. The following are the reference value table. When the bias current for LCD is more than Large Bias Current setting. It is recommended to add external cir- cuit to increase driving current. Interfacing Only six lines are required to interface with the HT1650. The CS line is used to initialize the serial interface circuit and to terminate the communication between the host controller and the HT1650. If the CS pin is set to 1, the data and command issued between the host controller and the HT1650 are first disabled and then initialized. Before issuing a mode command or mode switching, a high level pulse is required to initialize the serial inter- face of the HT1650. The DB0~DB3 are the 4-bit parallel data input/output lines. Data to be read or written or commands to be written have to pass through the DB0~DB3 lines. The RD line is the READ clock input. Data in the RAM are clocked out on the falling edge of the RD signal, and the clocked out data will then appear on the DB0~DB3 lines. It is recommended that the host controller read correct data during the interval between the rising edge and the next falling edge of the RD signal. The WR line is the WRITE clock input. The data, ad- dress, and command on the DB0~DB3 lines are all clocked into the HT1650 on the rising edge of the WR signal. There is an optional IRQ line to be used as an in- terface between the host controller and the HT1650. The IRQ pin can be selected as a timer output or a WDT overflow flag output by the S/W setting. The host con- troller can perform the time base or the WDT function by connecting with the IRQ pin of the HT1650. Bias VLCD Large Bias Current Middle Bias Current Small Bias Current 1/5 3V 165 mA70mA30mA 5V 270 mA 110 mA50mA 1/6 3V 140 mA55mA25mA 5V 225 mA90mA40mA R V S S V 3 V 4 1 / 6 B i a s R R R R P o w e r V L C D V R V L C D R R R V S S ( T 2 ) V 2 V 3 V 4 ( T 1 ) V 1 1 / 5 B i a s R R R R P o w e r V L C D V R V L C D ( T 3 ) V 5 ( T 4 ) V 6 R R ( T 2 ) V 2 ( T 1 ) V 1 ( T 3 ) V 5 ( T 4 ) V 6 Internal Resistor Type Bias Generator Configurations Note: The voltage applied to VLCD pin must be lower than 7V Adjust VR to fit LCD display |
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