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HT46R232 датащи(PDF) 25 Page - Holtek Semiconductor Inc |
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HT46R232 датащи(HTML) 25 Page - Holtek Semiconductor Inc |
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25 / 50 page ![]() HT46R232/HT46C232 Rev. 1.40 25 November 23, 2005 D a t a 1 0 1 0 0 1 0 0 1 0 0 1 0 1 0 1 1 S = S t a r t ( 1 b i t ) S A = S l a v e A d d r e s s ( 7 b i t s ) S R = S R W b i t ( 1 b i t ) M = S l a v e d e v i c e s e n d a c k n o w l e d g e b i t ( 1 b i t ) D = D a t a ( 8 b i t s ) A = A C K ( R X A K b i t f o r t r a n s m i t t e r , T X A K b i t f o r r e c e i v e r 1 b i t ) P = S t o p ( 1 b i t ) S C L S t a r t S D A S R W A C K A C K S t o p S C L S D A S S A S R M D A D A S S A S R M D A D A P S l a v e A d d r e s s I 2C Communication Timing Diagram Note: 1: Write the I 2C Bus address register (HADR) to define its own slave address. 2: Set HEN bit of I 2C Bus control register (HCR) bit 0 to enable the I2C Bus. Bit No. Label Function 0~2 ¾ Unused bit, read as ²0² 3 TXAK Enable/disable transmit acknowledge (0= acknowledge; 1= don ¢t acknowledge) 4 HTX Defines the transmit/receive mode (0= receive mode; 1= transmit) 5~6 ¾ Unused bit, read as ²0² 7 HEN Enable/disable I 2C Bus function (0= disable; 1= enable) HCR (21H) Register 3: Set EHI bit of the interrupt control register 1 (INTC1) bit 0 to enable the I 2C Bus interrupt. Bit No. Label Function 0 RXAK RXAK is cleared to ²0² when the master receives an 8-bit data and acknowledgment at the 9th clock, RXAK is set to ²1² means not acknowledged. 1 ¾ Unused bit, read as ²0² 2 SRW SRW is set to ²1² when the master wants to read data from the I2C Bus, so the slave must transmit data to the master. SRW is cleared to ²0² when the master wants to write data to the I 2C Bus, so the slave must receive data from the master. 3~4 ¾ Unused bit, read as ²0² 5 HBB HBB is set to ²1² when I2C Bus is busy and HBB is cleared to ²0² means that the I2C Bus is not busy. 6 HAAS HAAS is set to ²1² when the calling address has matched, and I2C Bus interrupt will occur and HCF is set. 7 HCF HCF is cleared to ²0² when one data byte is being transferred, HCF is set to ²1² indi- cating 8-bit data communication has been finished. HSR (22H) Register |
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