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CC2430-RTR1-F32 датащи(PDF) 105 Page - Texas Instruments |
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CC2430-RTR1-F32 датащи(HTML) 105 Page - Texas Instruments |
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105 / 234 page ![]() CC2430 CC2430 PRELIMINARY Data Sheet (rev. 1.03) SWRS036A Page 105 of 232 interrupts, the corresponding interrupt flag must be cleared by software before a new interrupt request is generated. Also, enabling an interrupt mask bit will generate a new interrupt request if the corresponding interrupt flag is set. 13.3.11 Timer 1 DMA Triggers There are three DMA triggers associated with Timer 1. These are DMA triggers T1_CH0, T1_CH1 and T1_CH2 which are generated on timer compare events as follows: • T1_CH0 – channel 0 compare • T1_CH1 – channel 1 compare • T1_CH2 – channel 2 compare 13.3.12 Timer 1 Registers This section describes the Timer 1 registers which consist of the following registers: • T1CNTH – Timer 1 Count High • T1CNTL – Timer 1 Count Low • T1CTL – Timer 1 Control and Status • T1CCTLx – Timer 1 Channel x Capture/Compare Control • T1CCxH – Timer 1 Channel x Capture/Compare Value High • T1CCxL – Timer 1 Channel x Capture/Compare Value Low |
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