CC2430-RTR1-F64Z datasheet(205/234 Pages) TI

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CC2430

CC2430 PRELIMINARY Data Sheet (rev. 1.03) SWRS036A

Page 205 of 232

Bit

Name

Reset

R/W

Function

7:5

000

R/W

Reserved. Always set to 000

PAN_COORDINATOR

R/W

PAN Coordinator enable. Used for filtering packets with no

destination address, as specified in section 7.5.6.2 in

802.15.4 [1]

0 : Device is not a PAN Coordinator

1 : Device is a PAN Coordinator

ADR_DECODE

R/W

Hardware Address decode enable.

0 : Address decoding is disabled

1 : Address decoding is enabled

2:0

CCA_HYST[2:0]

010

R/W

CCA Hysteresis in dB, values 0 through 7 dB

Table 46: Register MDMCTRL0H (0xDF02)

Bit

Name

Reset

R/W

Description

7:6

CCA_MODE[1:0]

R/W

Clear Channel Assessment mode select.

00 : Reserved

01 : CCA=1 when RSSI < CCA_THR-CCA_HYST

CCA=0 when RSSI >= CCA_THR

10 : CCA=1 when not receiving a packet

11 : CCA=1 when RSSI < CCA_THR-CCA_HYST and not

receiving a packet

CCA=0 when RSSI >= CCA_THR or receiving a packet

AUTOCRC

R/W

In packet mode a CRC-16 (ITU-T) is calculated and is

transmitted after the last data byte in TX. In RX CRC is

calculated and checked for validity.

AUTOACK

R/W

If AUTOACK is set, all packets accepted by address

recognition with the acknowledge request flag set and a

valid CRC are ack’ed 12 symbol periods after being

received.

3:0

PREAMBLE_LENGTH[3:0]

0010

R/W

The number of preamble bytes (2 zero-symbols) to be sent

in TX mode prior to the SYNCWORD. The reset value of

0010 is compliant with IEEE 802.15.4, since the 4

th zero

byte is included in the SYNCWORD.

0000 : 1 leading zero bytes (not recommended)

0001 : 2 leading zero bytes (not recommended)

0010 : 3 leading zero bytes (IEEE 802.15.4 compliant)

0011 : 4 leading zero bytes

…

1111 : 16 leading zero bytes

Table 47: Register MDMCTRL0L (0xDF03)

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