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CC2430-RTR1-F64Z датащи(PDF) 190 Page - Texas Instruments

номер детали CC2430-RTR1-F64Z
подробное описание детали  A True System-on-Chip solution for 2.4 GHz IEEE 802.15.4 / ZigBee-TM
PDF  234 Pages
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
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CC2430-RTR1-F64Z датащи(HTML) 190 Page - Texas Instruments

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CC2430
CC2430 PRELIMINARY Data Sheet (rev. 1.03) SWRS036A
Page 190 of 232
Immediate Command Strobes are written
as
an
Immediate
Command
Strobe
instruction to the CSP which are issued
instantly to the Radio module. The
Immediate Command Strobe instruction is
also used only to control the CSP. The
Immediate Command Strobe instructions
are described in section 1.1.1.
Program execution mode means that the
CSP executes a sequence of instructions,
from a program memory or instruction
memory, thus constituting a short user-
defined
program.
The
available
instructions are from a set of 14
instructions. The instruction set is defined
in section 1.1.1. The required program is
first loaded into the CSP by the CPU, then
the CPU instructs the CSP to start
executing the program.
The program execution mode together
with the MAC Timer allows the CSP to
automate CSMA-CA algorithms and thus
act as a co-processor for the CPU.
The operation of the CSP is described in
detail in the following sections. The
command strobes and other instructions
supported by the CSP are given in section
14.34.8 on page 194. Example programs
for the CSP are shown in section 14.34.9
on page 201.
RFST (0xE1) – RF CSMA-CA / Strobe Processor
Bit
Name
Reset
R/W
Description
7:0
INSTR[7:0] 0xC0
R/W
Data written to this register will be written to the CSP
instruction memory. Reading this register will return the
CSP instruction currently being executed.
14.34.1 Instruction Memory
The CSP executes single byte program
instructions which are read from a 24 byte
instruction
memory.
The
instruction
memory is written to sequentially through
the SFR register RFST. An instruction write
pointer is maintained within the CSP to
hold the location within the instruction
memory where the next instruction written
to RFST will be stored. Following a reset
the write pointer is reset to location 0.
During each RFST register write, the write
pointer will be incremented by 1 until the
end of memory is reached when the write
pointer will stop incrementing. The first
instruction written to RFST will be stored in
location 0, the location where program
execution starts. Thus a complete 24
instruction program is written to the
instruction
memory
by
writing
each
instruction in the desired order to the RFST
register.
The write pointer may be reset to 0 by
writing the immediate command strobe
instruction ISSTOP. In addition the write
pointer will be reset to 0 when the
command strobe SSTOP is executed in a
program.
Following a reset, the instruction memory
is filled with SNOP (No Operation)
instructions (opcode value 0xC0).
While the CSP is executing a program,
there shall be no attempts to write
instructions to the instruction memory by
writing to RFST. Failure to observe this
rule can lead to incorrect program
execution and corrupt instruction memory
contents. However, Immediate Command
Strobe instructions may be written to RFST
(see section 14.34.3).
14.34.2 Data Registers
The CSP has three data registers CSPT,
CSPX, CSPY and CSPZ, which are
read/write accessible for the CPU as RF
registers. These registers are read or
modified by some instructions, thus
allowing the CPU to set parameters to be
used by a CSP program or allowing the
CPU to read CSP program status.
The CSPT data register is not modified by
any instruction. The CSPT data register is
used to set a MAC Timer overflow
compare value. Once program execution
has started on the CSP, the contents of
this register is decremented by 1 each
time the MAC timer overflows. When CSPT



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