CC2430-RTR1-F64Z datasheet(188/234 Pages) TI

188 / 234 page

CC2430

CC2430 PRELIMINARY Data Sheet (rev. 1.03) SWRS036A

Page 188 of 232

data to chip data. Remember that

the chip sequence transmitted by

the test setup is not the same as

the bit sequence, which is output

CC2430.

•

When operating at or below the

sensitivity limit,

CC2430 may lose

symbol synchronization in infinite

receive mode. A new SFD and

restart of the receiver may be

required

re-gain

synchronization.

IEEE

802.15.4

system,

all

communication is based on packets. The

sensitivity limit specified by [1] is based on

Packet Error Rate (PER) measurements

instead of BER. This is a more realistic

measurement of the true RF performance

since it mirrors the way the actual system

operates.

Chipcon recommends performing PER

measurements

instead

BER

measurements

evaluate

the

performance of IEEE 802.15.4 systems.

To do PER measurements, the following

may be used as a guideline:

•

A valid preamble, SFD and length

field must be used for each

packet.

•

The PSDU (see Figure 45 on

page 173) length should be 20

bytes for sensitivity measurements

as specified by [1].

•

The sensitivity limit specified by [1]

is the RF level resulting in a 1%

PER. The packet sample space

for a given measurement must

then be >> 100 to have a

sufficiently large sample space.

E.g. at least 1000 packets should

used

measure

the

sensitivity.

•

The data transmitted over air must

be spread according to [1] and the

description on page 165. Pre-

generated packets may be used,

although [1] requires that the PER

is averaged over random PSDU

data.

•

The

CC2430 receive FIFO may be

used to buffer data received

during PER measurements, since

it is able to buffer up to 128 bytes.

•

The

MDMCTRL1H.CORR_THR

control register should be set to

20,

described

the

Demodulator,

Symbol

Synchronizer and Data Decision

section.

The simplest way of making a PER

measurement will be to use another

CC2430 as the reference transmitter.

However, this makes it difficult to measure

the exact receiver performance.

Using a signal generator, this may either

be set up as O-QPSK with half-sine

shaping or as MSK. If using O-QPSK, the

phases must be selected according to [1].

If using MSK, the chip sequence must be

modified such that the modulated MSK

signal has the same phase shifts as the O-

QPSK sequence previously defined.

For a desired symbol sequence s0, s1, … ,

sn-1 of length n symbols, the desired chip

sequence c0, c1, c2, …, c32n-1 of length 32n

is found using table lookup from Table 42

on page 165. It can be seen from

comparing the phase shifts of the O-QPSK

signal with the frequency of a MSK signal

that the MSK chip sequence is generated

as:

(c0 xnor c1), (c1 xor c2), (c2 xnor c3), … ,

(c32n-1 xor c32n) where c32n may be

arbitrarily selected.

14.32 PCB Layout Recommendation

A two layer PCB is highly recommended.

In Chipcon’s reference design, the top

layer is used for signal routing, and the

open areas are filled with metallization

connected to ground using several vias.

The area under the chip is used for

grounding and must be well connected to

the ground plane with several vias.

The ground pins should be connected to

ground as close as possible to the

package pin using individual vias. The de-

coupling capacitors should also be placed

as close as possible to the supply pins and

connected to the ground plane by

separate vias. Supply power filtering is

very important.

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