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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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CC2430-RTR1-F128Z датащи(PDF) 67 Page - Texas Instruments |
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CC2430-RTR1-F128Z датащи(HTML) 67 Page - Texas Instruments |
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67 / 234 page  CC2430 CC2430 PRELIMINARY Data Sheet (rev. 1.03) SWRS036A Page 67 of 232 MEMCTR (0xC7) – Memory Arbiter Control CC2430-F128 Bit Name Reset R/W Description 7 - 0 R0 Not used Unified memory mapping. When unified mapping is enabled, all physical memories are mapped into the CODE memory space as far as possible, when uniform mapping is disabled only flash memory is mapped to CODE space 0 Disable unified mapping 6 MUNIF 0 R/W 1 Enable unified mapping Flash bank map. Controls which of the four 32 KB flash memory banks to map to program address 0x8000 – 0xFFFF in CODE memory space. 00 Map program address 0x8000 – 0xFFFF to physical memory address 0x00000 – 0x07FFF 01 Map program address 0x8000 – 0xFFFF to physical memory address 0x08000– 0x0FFFF 10 Map program address 0x8000 – 0xFFFF to physical memory address 0x10000 – 0x17FFF 5:4 FMAP[1:0] 01 R/W 11 Map program address 0x8000 – 0xFFFF to physical memory address 0x18000 – 0x1FFFF 3:2 - 00 R0 Not used Flash cache disable. Invalidates contents of instruction cache and forces all instruction read accesses to read straight from flash memory. Disabling will increase power consumption and is provided for debug purposes. 0 Cache enabled 1 CACHDIS 0 R/W 1 Cache disabled 0 - 1 R/W Reserved. Always set to 1. 2 2 Reserved bits must always be set to the specified value. Failure to follow this will result in indeterminate behaviour. |
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