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CC2430-RTR1-F128 датащи(PDF) 104 Page - Texas Instruments

номер детали CC2430-RTR1-F128
подробное описание детали  A True System-on-Chip solution for 2.4 GHz IEEE 802.15.4 / ZigBee-TM
PDF  234 Pages
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
Logo TI - Texas Instruments

CC2430-RTR1-F128 датащи(HTML) 104 Page - Texas Instruments

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CC2430
CC2430 PRELIMINARY Data Sheet (rev. 1.03) SWRS036A
Page 104 of 232
0000h
1 - Set output on compare
2 - Clear output on compare
3 - Toggle output on compare
6 - Clear when T1CC0, set when T1CCn
7 - Set when T1CC0, clear when T1CCn
T1CCn
T1CCn
T1CC0
T1CC0
T1CC0
T1CCn
4 - Set output on compare-up,
clear on compare-down
5 - Clear output on compare-up,
set on compare-down
T1CCn
T1CCn
Figure 25: Output modes, timer up/down mode
13.3.10 Timer 1 Interrupts
There is one interrupt vector assigned to the
timer. An interrupt request is generated when
one of the following timer events occur:
•
Counter reaches terminal count value.
•
Input capture event.
•
Output compare event
The
register
bits
T1CTL.OVFIF,
T1CTL.CH0IF,
T1CTL.CH1IF,
and
T1CTL.CH2IF contains the interrupt flags for
the terminal count value event, and the three
channel compare/capture events, respectively.
An interrupt request is only generated when
the corresponding interrupt mask bit is set.
The interrupt mask bits are T1CCTL0.IM,
T1CCTL1.IM,
T1CCTL2.IM
and
TIMIF.OVFIM. If there are other pending



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