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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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CC2430-RTR1-F128 датащи(PDF) 46 Page - Texas Instruments |
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CC2430-RTR1-F128 датащи(HTML) 46 Page - Texas Instruments |
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46 / 234 page  CC2430 CC2430 PRELIMINARY Data Sheet (rev. 1.03) SWRS036A Page 46 of 232 Register name SFR Address Module Description U0DBUF 0xC1 USART0 USART 0 Receive/Transmit Data Buffer U0BAUD 0xC2 USART0 USART 0 Baud Rate Control U0UCR 0xC4 USART0 USART 0 UART Control U0GCR 0xC5 USART0 USART 0 Generic Control U1CSR 0xF8 USART1 USART 1 Control and Status U1DBUF 0xF9 USART1 USART 1 Receive/Transmit Data Buffer U1BAUD 0xFA USART1 USART 1 Baud Rate Control U1UCR 0xFB USART1 USART 1 UART Control U1GCR 0xFC USART1 USART 1 Generic Control WDCTL 0xC9 WDT Watchdog Timer Control 12.5 CPU Registers This section describes the internal registers found in the CPU. 12.5.1 Registers R0-R7 The CC2430 provides four register banks of eight registers each. These register banks are mapped in the DATA memory space at addresses 0x00-0x07, 0x08-0x0F, 0x10-0x17 and 0x18-0x1F. Each register bank contains the eight 8-bit register R0-R7. The register bank to be used is selected through the Program Status Word PSW.RS[1:0]. 12.5.2 Program Status Word The Program Status Word (PSW) contains several bits that show the current state of the CPU. The Program Status Word is accessible as an SFR and it is bit-addressable. PSW is shown below and contains the Carry flag, Auxiliary Carry flag for BCD operations, Register Select bits, Overflow flag and Parity flag. Two bits in PSW are uncommitted and can be used as user-defined status flags . |
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