OPA992 datasheet(29/70 Pages) TI

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–210 µV to +210 µV. At 4 σ (±840 µV), 99.9937% of the distribution has an offset voltage less than ±840 µV,

which means 0.0063% of the population is outside of these limits, which corresponds to about 1 in 15,873 units.

Specifications with a value in the minimum or maximum column are assured by TI, and units outside these limits

will be removed from production material. For example, the OPAx992 family has a maximum offset voltage of

1 mV at 25°C, and even though this corresponds to slightly less than 5 σ (≈1 in 1.7 million units), which is

extremely unlikely, TI assures that any unit with larger offset than 1 mV will be removed from production material.

For specifications with no value in the minimum or maximum column, consider selecting a sigma value of

sufficient guardband for your application, and design worst-case conditions using this value. For example, the

6-σ value corresponds to about 1 in 500 million units, which is an extremely unlikely chance, and could be

an option as a wide guardband to design a system around. In this case, the OPAx992 family does not have

a maximum or minimum for offset voltage drift. But based on the typical value of 0.25 µV/°C in the Electrical

Characteristics table, it can be calculated that the 6-σ value for offset voltage drift is about 1.5 µV/°C. When

designing for worst-case system conditions, this value can be used to estimate the worst possible offset across

temperature without having an actual minimum or maximum value.

Note that process variation and adjustments over time can shift typical means and standard deviations, and

unless there is a value in the minimum or maximum specification column, TI cannot assure the performance of a

device. This information should be used only to estimate the performance of a device.

7.3.10 Packages With an Exposed Thermal Pad

The OPAx992 family is available in the WSON-8 (DSG) package which features an exposed thermal pad. Inside

the package, the die is attached to this thermal pad using an electrically conductive compound. For this reason,

when using a package with an exposed thermal pad, the thermal pad must either be connected to V– or left

floating. Attaching the thermal pad to a potential other than V– is not allowed, and performance of the device is

not assured when doing so.

7.3.11 Shutdown

The OPAx992S devices feature one or more shutdown pins (SHDN) that disable the op amp, placing it into a

low-power standby mode. In this mode, the op amp typically consumes about 40 µA. The SHDN pins are active

high, meaning that shutdown mode is enabled when the input to the SHDN pin is a valid logic high. The amplifier

is enabled when the input to the SHDN pin is a valid logic low.

The SHDN pins are referenced to the negative supply rail of the op amp. The threshold of the shutdown feature

lies around 800 mV (typical) and does not change with respect to the supply voltage. Hysteresis has been

included in the switching threshold to ensure smooth switching characteristics. To ensure optimal shutdown

behavior, the SHDN pins should be driven with valid logic signals. A valid logic low is defined as a voltage

between V– and V– + 0.2 V. A valid logic high is defined as a voltage between V– + 1.1 V and V– + 20 V.

The shutdown pin circuitry includes a pull-down resistor, which will inherently pull the voltage of the pin to the

negative supply rail if not driven. Thus, to enable the amplifier, the SHDN pins should either be left floating or

driven to a valid logic low. To disable the amplifier, the SHDN pins must be driven to a valid logic high. The

maximum voltage allowed at the SHDN pins is V– + 20 V or V+, whichever is lower. Exceeding V– + 20V or V+,

whichever is lower, will damage the device.

The SHDN pins are high-impedance CMOS inputs. Channels of single and dual op amp packages are

independently controlled, and channels of quad op amp packages are controlled in pairs. For battery-operated

applications, this feature may be used to greatly reduce the average current and extend battery life. The

typical enable time out of shutdown is 15 µs; disable time is 3 µs. When disabled, the output assumes a

high-impedance state. This architecture allows the OPAx992S family to operate as a gated amplifier, multiplexer,

or programmable-gain amplifier. Shutdown time (tOFF) depends on loading conditions and increases as load

resistance increases. To ensure shutdown (disable) within a specific shutdown time, the specified 10-kΩ load to

V- is required. If using the OPAx992S without a load, the resulting turnoff time significantly increases.

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OPA992, OPA2992, OPA4992

SBOSA10D – JUNE 2021 – REVISED AUGUST 2022

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