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R7FA6T2AB3CFP датащи(PDF) 49 Page - Renesas Technology Corp |
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R7FA6T2AB3CFP датащи(HTML) 49 Page - Renesas Technology Corp |
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49 / 93 page ![]() Table 2.27 SCI timing (Simple IIC mode) Conditions: Middle drive output is selected in the Port Drive Capability bit in the PmnPFS register. Parameter Symbol Min Max Unit Note Simple IIC (Standard mode) SCL, SDA input rise time tSr — 1000 ns SCL, SDA input fall time tSf — 300 ns SCL, SDA input spike pulse removal time tSP 0 4 × tTcyc ns Data input setup time tSDAS 250 — ns Data input hold time tSDAH 0 — ns SCL, SDA capacitive load Cb*1 — 400 pF Simple IIC (Fast mode) SCL, SDA input rise time tSr — 300 ns SCL, SDA input fall time tSf — 300 ns SCL, SDA input spike pulse removal time tSP 0 4 × tTcyc ns Data input setup time tSDAS 100 — ns Data input hold time tSDAH 0 — ns SCL, SDA capacitive load Cb*1 — 400 pF Note: tTcyc: SCITCLK cycle. Note 1. Cb indicates the total capacity of the bus line. SDAn SCLn VIH VIL P*1 S*1 tSf tSr tSDAH tSDAS tSP P*1 Test conditions: VIH = VCC × 0.7, VIL = VCC × 0.3 VOL = 0.6 V, IOL = 6 mA (ICFER.FMPE = 0) VOL = 0.4 V, IOL = 20 mA (ICFER.FMPE = 1) Sr*1 Note: n = 0 to 4, 9 Note 1. S, P, and Sr indicate the following conditions: S: Start condition P: Stop condition Sr: Restart condition Figure 2.38 SCI simple IIC mode timing RA6T2 Datasheet 2. Electrical Characteristics R01DS0400EJ0120 Rev.1.20 Mar 31, 2022 Page 49 of 93 |
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