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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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FXLS8974CF датащи(PDF) 12 Page - NXP Semiconductors |
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FXLS8974CF датащи(HTML) 12 Page - NXP Semiconductors |
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12 / 96 page  NXP Semiconductors FXLS8974CF 3-Axis Low-g Accelerometer Pin Name Pin Description SCL I2C serial clock (pull-up resistor is required) SDA I2C serial data (pull-up resistor is required) Table 10. I2C serial interface pin description 12.1 I2C interface characteristics The I2C secondary address (7-bit format) is set to 18h when SA0 = 0, and 19h when SA0 = 1. SA0 I2C write address I2C read address 0 30h (0011 0000b) 31h (0011 0001b) 1 32h (0011 0010b) 33h (0011 0011b) Table 11. FXLS8974CF I2C read and write addresses I2C Standard- mode[1] I2C Fast-mode[1] I2C Fast-mode Plus[2] Parameter Symbol Min Max Min Max Min Max Unit SCL clock frequency fSCL 0 100 0 400 0 1000 kHz Bus free time between STOP and START conditions tBUF 4.7 — 1.3 — 0.5 — µs Repeated START hold time tHD;STA 4 — 0.6 — 0.26 — µs Repeated START setup time tSU;STA 4.7 — 0.6 — 0.26 — µs STOP condition setup time tSU;STO 4 — 0.6 — 0.26 — µs SDA valid time[3] tVD;DAT — 3.45[4] — 0.9[4] — 0.45[4] µs SDA valid acknowledge time[5] tVD;ACK — 3.45[4] — 0.9[4] — 0.45[4] µs SDA setup time tSU;DAT 250 — 100[6] — 50 — ns SCL clock low time tLOW 4.7 — 1.3 — 0.50 — µs SCL clock high time tHIGH 4.0 — 0.6 — 0.26 — µs SDA and SCL risetime tr — 1000 20 300 — 120 ns SDA and SCL fall time[7][8] tf — 300 — 300 — 120 ns Pulse width of spikes on SDA and SCL (suppressed by the input filter) tSP 0 50 0 50 0 50 ns Table 12. I2C secondary timing values for Standard-mode (Sm), Fast-mode (Fm), and Fast-mode Plus (Fm +) [1] All values referred to VIH(min) and VIL(max) levels. [2] Should be backward compatible with Fast mode. FXLS8974CF All information provided in this document is subject to legal disclaimers. © NXP B.V. 2022. All rights reserved. Product data sheet Rev. 1.5 — 11 March 2022 12 / 96 |
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