LTM4631 datasheet(52/130 Pages) AD

52 / 130 page

LTM4686B

Rev. 0

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APPLICATIONS INFORMATION

Coincident rail tracking can be achieved by setting two

outputs to have the same turn-on/off slew rates, identical

turn-on delays, and appropriately chosen turn-off delays

(see Equation 7 through Equation 9).

VOUT _COMMANDRAIL1

TON_RISERAIL1

VOUT _COMMANDRAIL2

TON_RISERAIL2

and

VOUT _COMMANDRAIL1

TOFF _FALLRAIL1

VOUT _COMMANDRAIL2

TOFF _FALLRAIL2

(7)

and

TON_DELAYRAIL1 = TON_DELAYRAIL2

and (if VOUT_COMMANDRAIL2 ≥ VOUT_COMMANDRAIL1)

TOFF _DELAYRAIL1 =

TOFF _DELAYRAIL2 + 1–

VOUT _COMMANDRAIL1

VOUT _COMMANDRAIL2

⎛

⎝⎜

⎞

⎠⎟

•TOFF _FALLRAIL2

(8)

or else (VOUT_COMMANDRAIL2 < VOUT_COMMANDRAIL1)

TOFF _DELAYRAIL2 =

TOFF _DELAYRAIL1+ 1–

VOUT _COMMANDRAIL2

VOUT _COMMANDRAIL1

⎛

⎝⎜

⎞

⎠⎟

•TOFF _FALLRAIL1

(9)

The described method of start-up sequencing is time

based. For concatenated events it is possible to control

the RUN pin based on the GPIOn pin of a different con-

troller (see Figure 1). The GPIOn pin can be configured

to release when the output voltage of the converter is

greater than the VOUT_UV_FAULT_LIMITn. It is recom-

mended to use the unfiltered VOUT UV fault limit because

there is little appreciable time delay between the con-

verter crossing the UV threshold and the GPIOn pin

releasing. The unfiltered output can be enabled by the

MFR_GPIO_PROPAGATEn[12] setting. (Refer to the MFR

section of the PMBus commands in Appendix C: PMBus

Command Details). The unfiltered signal may have some

glitching as the VOUT signal transitions through the com-

parator threshold. A small digital filter of 250µs internally

deglitches the GPIOn pins. If the TON_RISE time is greater

than 100ms, the deglitch filter should be complimented

with an externally applied capacitor between GPIOn and

ground—to further filter the waveform. The RC time-con-

stant of the filter should be set sufficiently fast to assure

no appreciable delay is incurred. For most applications,

a value of 300µs to 500µs will provide sufficient filtering

without significantly delaying the trigger event.

DIGITAL SERVO MODE

For maximum accuracy in the regulated output voltage,

enable the digital servo loop by asserting bit 6 of the

MFR_PWM_MODEn command. In digital servo mode,

the LTM4686B adjusts the regulated output voltage based

on the ADC voltage reading. Every 90ms the digital servo

loop steps the LSB of the DAC (nominally 1.375mV or

0.6875mV depending on the voltage range bit, MFR_

PWM_MODEn[1]) until the output is at the correct ADC

reading. At power-up this mode engages after TON_MAX_

FAULT_LIMITn unless the limit is set to 0 (infinite). If

the TON_MAX_FAULT_LIMITn is set to 0 (infinite), the

servo begins after TON_RISEn is complete and VOUTn

has exceeded VOUT_UV_FAULT_LIMITn and IOUT_OCn

is not present. This same point in time is when the output

changes from discontinuous to the mode commanded by

MFR_PWM_MODEn[0]. Refer to Figure 2 for details on

the VOUTn waveform under time based sequencing.

DAC VOLTAGE

ERROR (NOT

TO SCALE)

TIME DELAY OF

MANY SECONDS

DIGITAL SERVO

MODE ENABLED FINAL OUTPUT

VOLTAGE REACHED

TON_MAX_FAULT_LIMITn

TON_RISEn

TIME

4686B F02

TON_DELAYn

VOUTn

RUNn

VOUT_UV_FAULT_LIMITn

Figure 2. Timing Controlled VOUT Rise

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