TLE 7259 G

Preliminary Data Sheet

13

Rev. 1.3, 2004-12-13

Bus Receiver

Receiver threshold

voltage, recessive to

dominant edge

V

BUS,rd

0.42

×

V

S

0.48

×

V

S

–V

–

Receiver dominant

state

V

BUS,dom

–

–

0.42

×

V

S

V

(LIN Spec 1.3 (2.0);

Line 10.1.9 (3.1.9))

Receiver threshold

voltage, dominant to

recessive edge

V

BUS,dr

–0.52

×

V

S

0.58

×

V

S

V

V

Receiver recessive

state

V

BUS,rec

0.58

×

V

S

–

–

V

(LIN Spec 1.3 (2.0);

Line 10.1.10 (3.1.10)

Receiver center

voltage

V

BUS,c

0.475

S

0.5

×

V

S

0.525

S

V

(LIN Spec 1.3 (2.0);

Line 10.1.11 (3.1.11)

Receiver hysteresis

V

BUS,hys

0.02

×

V

S

0.04

×

V

S

0.1

×

V

S

V

V

V

(LIN Spec 1.3 (2.0);

Line 10.1.12 (3.1.12))

Wake-up threshold

voltage

V

BUS,wk

0.40

×

V

S

0.5

×

V

S

0.6

×

V

S

V–

Dominant time for bus

wake-up

t

WK,bus

30

–

150

µs–

Table 4

Electrical Characteristics (cont’d)

7.0 V <

V

to ground; positive current flowing into pin; unless otherwise specified.

Parameter

Symbol

Limit Values

Unit Remarks

Min.

Typ.

Max.