PIC18F1230-ESLASHP datasheet(21/312 Pages) MICROCHIP

21 / 312 page

PIC18F1230/1330

Advance Information

DS39758B-page 19

2.6.5.1

Compensating with the EUSART

An adjustment may be required when the EUSART

begins to generate framing errors or receives data with

errors while in Asynchronous mode. Framing errors

indicate that the device clock frequency is too high; to

adjust for this, decrement the value in OSCTUNE to

reduce the clock frequency. On the other hand, errors

in data may suggest that the clock speed is too low; to

compensate, increment OSCTUNE to increase the

clock frequency.

2.6.5.2

Compensating with the Timers

This technique compares device clock speed to some

reference clock. Two timers may be used; one timer is

clocked by the peripheral clock, while the other is

clocked by a fixed reference source, such as the

Timer1 oscillator.

Both timers are cleared, but the timer clocked by the

reference generates interrupts. When an interrupt

occurs, the internally clocked timer is read and both

timers are cleared. If the internally clocked timer value

is greater than expected, then the internal oscillator

block is running too fast. To adjust for this, decrement

the OSCTUNE register.

OSCTUNE: OSCILLATOR TUNING REGISTER

R/W-0

R/W-0(1)

U-0

R/W-0

INTSRC

PLLEN(1)

—

TUN4

TUN3

TUN2

TUN1

TUN0

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

INTSRC: Internal Oscillator Low-Frequency Source Select bit

= 31.25 kHz device clock derived from 8 MHz INTOSC source (divide-by-256 enabled)

= 31 kHz device clock derived directly from INTRC internal oscillator

bit 6

PLLEN: Frequency Multiplier PLL for INTOSC Enable bit(1)

= PLL enabled for INTOSC (4 MHz and 8 MHz only)

= PLL disabled

bit 5

Unimplemented: Read as ‘0’

bit 4-0

TUN4:TUN0: Frequency Tuning bits

01111

= Maximum frequency

•

00001

00000

= Center frequency. Oscillator module is running at the calibrated frequency.

11111

•

10000

= Minimum frequency

Note 1:

Available only in certain oscillator configurations; otherwise, this bit is unavailable and reads as ‘0’. See

Section 2.6.4 “PLL in INTOSC Modes” for details.

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