PCB LAYOUT CONSIDERATIONS

LMH1981 IC Placement

The LMH1981 should be placed such that critical signal

paths are short and direct to minimize PCB parasitics from

degrading the high-speed video input and logic output sig-

nals.

Ground Plane

A two-layer, FR-4 PCB is sufficient for this device. One of the

PCB layers should be dedicated to a single, solid ground

plane that runs underneath the device and connects the

device GND pins together. The ground plane should be used

to connect other components and serve as the common

ground reference. It also helps to reduce trace inductances

and minimize ground loops. Try to route supply and signal

traces on another layer to maintain as much ground plane

continuity as possible.

Power Supply Pins

The power supply pins should be connected together using

short traces with minimal inductance. When routing the sup-

ply traces, be careful not to disrupt the solid ground plane.

For high frequency bypassing, place 0.1 µF SMD ceramic

bypass capacitors with very short connections to power

supply and GND pins. Two or three ceramic bypass capaci-

tors can be used depending on how the supply pins are

connected together. Place a 10 µF SMD tantalum bypass

capacitor nearby all three power supply pins for low fre-

quency supply bypassing.

R

The R

Ω 0.1% SMD resistor with

a temperature coefficient under 100 ppm/˚C. Place R

close as possible to the device and connect to pin 1 and the

ground plane using the shortest possible connections. All

input and output signals must be kept away from this pin to

prevent unwanted signals from coupling into this pin.

Video Input

The input signal path should be routed using short, direct

traces between video source and input pin. Use a 75

Ω input

termination and a SMD capacitor for AC coupling the video

input to pin 4.

Output Routing

The output signal paths should be routed using short, direct

traces to minimize parasitic effects that may degrade these

high-speed logic signals. This is especially important for the

horizontal sync output, in which it is critical to minimize

timing jitter. Each output can be protected by current limiting

with a small series resistor, like 100

Ω.

20174510

FIGURE 13. Video Format Output for Progressive Format, 480p

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