NVTYS005N04CL datasheet(2/7 Pages) ONSEMI

2 / 7 page

April, 2021 − Rev. 1

Publication Order Number:

NVTYS005N04CL/D

MOSFET – Power, Single

N-Channel

40 V, 4.8 mW, 75 A

NVTYS005N04CL

Features

• Small Footprint (3.3 x 3.3 mm) for Compact Design

• Low RDS(on) to Minimize Conduction Losses

• Low Capacitance to Minimize Driver Losses

• AEC−Q101 Qualified and PPAP Capable

• These Devices are Pb−Free and are RoHS Compliant

MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)

Parameter

Symbol

Value

Unit

Drain−to−Source Voltage

VDSS

Gate−to−Source Voltage

VGS

±20

Continuous Drain

Current RqJC

(Notes 1, 2, 3, 4)

Steady

State

TC = 25°C

TC = 100°C

Power Dissipation

RqJC (Notes 1, 2, 3)

TC = 25°C

TC = 100°C

Continuous Drain

Current RqJA

(Notes 1, 3, 4)

Steady

State

TA = 25°C

TA = 100°C

Power Dissipation

RqJA (Notes 1, 3)

TA = 25°C

3.1

TA = 100°C

1.6

Pulsed Drain Current

TA = 25°C, tp = 10 ms

IDM

326

Operating Junction and Storage Temperature

Range

TJ, Tstg

−55 to

+175

°C

Source Current (Body Diode)

Single Pulse Drain−to−Source Avalanche

Energy (IL(pk) = 4.6 A)

EAS

142

Lead Temperature for Soldering Purposes

(1/8″ from case for 10 s)

260

°C

Stresses exceeding those listed in the Maximum Ratings table may damage the

device. If any of these limits are exceeded, device functionality should not be

assumed, damage may occur and reliability may be affected.

THERMAL RESISTANCE MAXIMUM RATINGS (Note 1)

Parameter

Symbol

Value

Unit

Junction−to−Case − Steady State (Note 3)

RqJC

3.0

°C/W

Junction−to−Ambient − Steady State (Note 3)

RqJA

47.7

1. The entire application environment impacts the thermal resistance values shown,

they are not constants and are only valid for the particular conditions noted.

2. Psi (Y) is used as required per JESD51−12 for packages in which substantially

less than 100% of the heat flows to single case surface.

3. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad.

4. Continuous DC current rating. Maximum current for pulses as long as 1

second is higher but is dependent on pulse duration and duty cycle.

www.onsemi.com

V(BR)DSS

RDS(on) MAX

ID MAX

40 V

4.8 mW @ 10 V

75 A

LFPAK8

3.3x3.3

CASE 760AD

MARKING DIAGRAM

(Note: Microdot may be in either location)

N−Channel

D (5 − 8)

S (1, 2, 3)

G (4)

See detailed ordering, marking and shipping information in the

package dimensions section on page 5 of this data sheet.

ORDERING INFORMATION

7.6 mW @ 4.5 V

005N

04CL

AWLYW

005N04CL = Specific Device Code

= Assembly Location

= Wafer Lot

= Year

= Work Week

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