SST25PF040C datasheet(6/47 Pages) MICROCHIP

6 / 47 page

SST25PF040C

DS20005397F-page 6

 2015-2022 Microchip Technology Inc. and its subsidiaries

4.0.1

HOLD

In the hold mode, serial sequences underway with the

SPI Flash memory are paused without resetting the

clocking sequence. To activate the HOLD# mode, CE#

must be in active low state. The HOLD# mode begins

when the SCK active low state coincides with the falling

edge of the HOLD# signal. The Hold mode ends when

the rising edge of the HOLD# signal coincides with the

SCK active low state. HOLD# must not rise or fall when

SCK logic level is high. See Figure 4-2 for Hold Condi-

tion waveform.

Once the device enters Hold mode, SO will be in high-

impedance state while SI and SCK can be VIL or VIH.

If CE# is driven active high during a Hold condition, the

device returns to standby mode. The device can then

be re-initiated with the command sequences listed in

Table 5-1. As long as HOLD# signal is low, the memory

remains in the Hold condition. To resume communica-

tion with the device, HOLD# must be driven active high,

and CE# must be driven active low. See Figure 4-2 for

Hold timing.

FIGURE 4-2:

HOLD CONDITION WAVEFORM

4.1

Write Protection

SST25PF040C provides software Write protection. The

Write-Protect pin (WP#) enables or disables the lock-

down function of the STATUS register. The Block Pro-

tection bits (BP0, BP1, BP2, TB, and BPL) in the STA-

TUS register provide Write protection to the memory

array and the STATUS register. See Table 4-3 for the

Block-Protection description.

4.1.1

WRITE-PROTECT PIN (WP#)

The Write-Protect (WP#) pin enables the lock-down

function of the BPL bit (bit 7) in the STAUS register.

When WP# is driven low, the execution of the Write

STATUS Register (WRSR) instruction is determined by

the value of the BPL bit (see Table 4-1). When WP# is

high, the lock-down function of the BPL bit is disabled.

Active

Hold

Active

SCK

HOLD#

TABLE 4-1:

CONDITIONS TO EXECUTE WRITE STATUS REGISTER (WRSR) INSTRUCTION

WP#

BPL

Execute WRSR Instruction

Not Allowed

Allowed

SST25PF040C датащи(PDF) 6 Page - Microchip Technology

SST25PF040C датащи(HTML) 6 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47

датащи скачать

ссылки URL