поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

USB7016 датащи(PDF) 33 Page - Microchip Technology

номер детали USB7016
подробное описание детали  6-Port USB 3.2 Gen 1 SmartHubTM Controller
PDF  60 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

USB7016 датащи(HTML) 33 Page - Microchip Technology

Back Button USB7016 Datasheet HTML 29Page - Microchip Technology USB7016 Datasheet HTML 30Page - Microchip Technology USB7016 Datasheet HTML 31Page - Microchip Technology USB7016 Datasheet HTML 32Page - Microchip Technology USB7016 Datasheet HTML 33Page - Microchip Technology USB7016 Datasheet HTML 34Page - Microchip Technology USB7016 Datasheet HTML 35Page - Microchip Technology USB7016 Datasheet HTML 36Page - Microchip Technology USB7016 Datasheet HTML 37Page - Microchip Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 33 / 60 page
background image
 2022 Microchip Technology Inc. and its subsidiaries
DS00003740B-page 33
USB7016
7.2
SMBus/I2C Master/Slave Interfaces
The device provides three independent SMBus/I2C controllers (Slave, Master) which can be used to access internal
device run time registers or program the internal OTP memory. The device contains two 128 byte buffers to enable
simultaneous master/slave operation and to minimize firmware overhead in processed I2C packets. The I2C interfaces
support 100KHz Standard-mode (Sm) and 400KHz Fast Mode (Fm) operation.
The SMBus/I2C interfaces are assigned to programmable pins (PFx) and therefore the device must be programmed into
specific configurations to enable specific interfaces. Refer to Section 3.3.4, PF[31:3] Configuration (CFG_STRAP[2:1])
for additional information.
7.3
I2S Interface
The device provides an integrated I2S interface to facilitate the connection of digital audio devices. The I2S interface
conforms to the voltage, power, and timing characteristics/specifications as set forth in the I2S-Bus Specification, and
consists of the following signals:
• I2S_SDI: Serial Data Input
• I2S_SDO: Serial Data Output
• I2S_SCK: Serial Clock
• I2S_LRCK: Left/Right Clock (SS/FSYNC)
• I2S_MCLK: Master Clock
• MIC_DET: Microphone Plug Detect
Each audio connection is half-duplex, so I2S_SDO exists only on the transmit side and I2S_SDI exists only on the
receive side of the interface. Some codecs refer to the Serial Clock (I2S_SCK) as Baud/Bit Clock (BCLK). Also, the Left/
Right Clock is commonly referred to as LRC or LRCK. The I2S and other audio protocols refer to LRC as Word Select
(WS).
The following codec is supported by default:
• Analog Devices ADAU1961 (24-bit 96KHz)
The I2S interface is assigned to programmable pins (PFx) and therefore the device must be programmed into specific
configurations to enable the interface. Refer to Section 3.3.4, PF[31:3] Configuration (CFG_STRAP[2:1]) for additional
information.
7.3.1
MODES OF OPERATION
The USB audio class operates in three ways: Asynchronous, Synchronous and Adaptive. There are also multiple oper-
ating modes, such as hi-res, streaming, etc.. Typically for USB devices, inputs such as microphones are Asynchronous,
and output devices such as speakers are Adaptive. The hardware is set up to handle all three modes of operation. It is
recommended that the following configuration be used: Asynchronous IN; Adaptive OUT; 48Khz streaming mode; Two
channels: 16 bits per channel.
7.3.1.1
Asynchronous IN 48KHz Streaming
In this mode, the codec sampling clock is set to 48Khz based on the local oscillator. This clock is never changed. The
data from the codec is fed into the input FIFO. Since the sampling clock is asynchronous to the host clock, the amount
of data captured in every USB frame will vary. This issue is left for the host to handle. The input FIFO has two markers,
a low water mark (THRESHOLD_LOW_VAL), and a high water mark (THRESHOLD_HIGH_VAL). There are three reg-
isters to determine how much data to send back in each frame. If the amount of data in the FIFO exceeds the high water
mark, then HI_PKT_SIZE worth of data is sent. If the data is between the high and low water mark, the normal MID_P-
KT_SIZE amount of data is sent. If the data is below the low water mark, LO_PKT_SIZE worth of data is sent.
Note:
For SMBus/I2C timing information, refer to Section 9.6.7, SMBus Timing and Section 9.6.8, I2C Timing.
Note:
For I2S timing information, refer to Section 9.6.9, I2S Timing. For detailed information on utilizing the I2S
interface, including support for other codecs, refer to the application note “USB7202/USB725x I2S Opera-
tion
”, which can be found on the Microchip USB7016 product page at www.microchip.com/USB7016.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com