MPC5604BC datasheet(63/109 Pages) NXP

63 / 109 page

Package pinouts and signal descriptions

MPC5604B/C Microcontroller Data Sheet, Rev. 15

NXP Semiconductors

2.20.3.1

Electrostatic discharge (ESD)

Electrostatic discharges (a positive then a negative pulse separated by 1 second) are applied to the pins of

each sample according to each pin combination. The sample size depends on the number of supply pins in

the device (3 parts*(n+1) supply pin). This test conforms to the AEC-Q100-002/-003/-011 standard.

2.20.3.2

Static latch-up (LU)

Two complementary static tests are required on six parts to assess the latch-up performance:

•

A supply overvoltage is applied to each power supply pin.

•

A current injection is applied to each input, output and configurable I/O pin.

These tests are compliant with the EIA/JESD 78 IC latch-up standard.

2.21

Fast external crystal oscillator (4 to 16 MHz) electrical

characteristics

The device provides an oscillator/resonator driver. Figure 14 describes a simple model of the internal

oscillator driver and provides an example of a connection for an oscillator or a resonator.

Table 36 provides the parameter description of 4 MHz to 16 MHz crystals used for the design simulations.

Table 34. ESD absolute maximum ratings1 2

1 All ESD testing is in conformity with CDF-AEC-Q100 Stress Test Qualification for Automotive Grade Integrated

Circuits.

2 A device will be defined as a failure if after exposure to ESD pulses the device no longer meets the device

specification requirements. Complete DC parametric and functional testing shall be performed per applicable

device specification at room temperature followed by hot temperature, unless specified otherwise in the device

specification.

Symbol

Ratings

Conditions

Class

Max value

Unit

VESD(HBM) CC T Electrostatic discharge voltage

(Human Body Model)

TA = 25 °C

conforming to AEC-Q100-002

H1C

2000

VESD(MM) CC T Electrostatic discharge voltage

(Machine Model)

TA = 25 °C

conforming to AEC-Q100-003

200

VESD(CDM) CC T Electrostatic discharge voltage

(Charged Device Model)

TA = 25 °C

conforming to AEC-Q100-011

C3A

500

750 (corners)

Table 35. Latch-up results

Symbol

Parameter

Conditions

Class

T Static latch-up class

TA = 125 °C

conforming to JESD 78

II level A

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