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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LPC804 датащи(PDF) 83 Page - NXP Semiconductors |
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LPC804 датащи(HTML) 83 Page - NXP Semiconductors |
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83 / 89 page  LPC804 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2021. All rights reserved. Product data sheet Rev. 2.0 — 21 September 2021 83 of 87 NXP Semiconductors LPC804 32-bit Arm Cortex-M0+ microcontroller 20. Revision history Table 35. Revision history Document ID Release date Data sheet status Change notice Supersedes LPC804 v.2.0 20210917 Product data sheet CIN202109011I LPC804 v.1.9 Added fab code character for HVQFN33 top side markings in Section 5 “Marking”. LPC804 v.1.9 20210810 Product data sheet - LPC804 v.1.8 Updated HVQFN33 top side markings in Section 5 “Marking”. LPC804 v.1.8 20210318 Product data sheet - LPC804 v.1.7 Updated Table 4 “Pin description”. Updated Figure 12 “LPC804 clock generation”. LPC804 v.1.7 20200904 Product data sheet - LPC804 v.1.6 Updated Table 9 “Limiting values” and Table 10 “Thermal resistance” to include WLCSP20 data. LPC804 v.1.6 20200513 Product data sheet - LPC804 v.1.5 Updated Device revision table to include revision identifier 1C. LPC804 v.1.5 20190630 Product data sheet - LPC804 v.1.4 Updated Table 16 “Dynamic characteristic: FRO”. to include spec for Temp = 70 C to 85 C LPC804 v.1.4 20180712 Product data sheet 201804020F01 LPC804 v.1.3 • Added LPC804UK device. • Updated Section 5 “Marking”. • Updated Table 25 “12-bit ADC static characteristics”: Changed typical offset error (EO) to 3 LSB. Added table note text: For device revision 1B, typical offset value is 3 LSB. For device revision 1A, the typical offset value is 8 LSB. • Updated Section 9.25.1 “Internal oscillators”. Changed heading title. • Updated Section 15.2 “Connecting power, clocks, and debug functions”: removed text: connect the external crystal. LPC804 v.1.3 20180323 Product data sheet - LPC804 v.1.2 Modifications: • Fixed revision number. • Updated Table 15 “Flash characteristics”. ter consolidated to tprog/ter. • Updated Section 9.25.4.4 “Deep power-down mode” with text: Five general-purpose registers are available to store information during deep power-down mode. LPC804 v.1.2 20180227 Product data sheet - LPC804 v.1.1 Modifications: • Updated Table 12 “Static characteristics, supply pins”: Added condition: system clock = 1 MHz, VDD = 3.3 V. • Updated Table 16 “Dynamic characteristic: FRO”: Max values: FRO clock frequency; Condition: 20 C Tamb 70 C and FRO clock frequency; Condition: 40 C Tamb 105 C. • Updated title of Section 13.1 “Flash memory (EEPROM based)”. LPC804 v.1.1 20180214 Product data sheet - LPC804 v.1 |
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