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PCF8545ATTAY датащи(PDF) 39 Page - NXP Semiconductors |
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PCF8545ATTAY датащи(HTML) 39 Page - NXP Semiconductors |
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39 / 68 page ![]() NXP Semiconductors PCF8545 Universal LCD driver for multiplex rates up to 1:8 8.2.8 I2C-bus protocol The I2C-bus protocol is shown in Figure 30. The sequence is initiated with a START condition (S) from the I2C-bus controller which is followed by one of the two PCF8545 target addresses available. All PCF8545 with the corresponding A0 level acknowledge in parallel to the target address. But any PCF8545 with the alternative A0 level ignore the whole I2C-bus transfer. After acknowledgement, a control byte follows (see Section 8.1). The display bytes are stored in the display RAM at the address specified by the RAM data pointer. The acknowledgement after each byte is made only by the addressed PCF8545. After the last data byte, the I2C-bus controller issues a STOP condition (P). Alternatively a START may be issued to RESTART an I2C-bus access. EXAMPLES a) transmit two byte of RAM data 013aaa462 A 0 S 0 1 1 1 0 0 control byte target address RAM/command byte RAM DATA M S B L S B A A P R/W = 0 S 0 1 1 1 0 0 0 1 A A A P A b) transmit two command bytes COMMAND S 0 1 1 1 0 0 1 0 A A A P COMMAND A A c) transmit one command byte and two RAM date bytes COMMAND S 0 1 1 1 0 0 1 0 0 0 0 0 A A A P A A A C O R S 1 0 A 0 0 A 0 0 A 0 A 1 R S 0 0 0 0 0 1 RAM DATA RAM DATA RAM DATA Figure 30. I2C-bus protocol write mode 8.2.8.1 Status read out Status read out for I2C-bus operation only. This command initiates the read-out of a fixed value plus the target address bit A0 from the PCF8545. The read-out function allows the I2C controller to confirm the existence of the device on the I2C-bus. Bit Symbol Value Description 7 to 1 - 0101 010 fixed value 0 read back value is 0101 0100 0 A0 1 read back value is 0101 0101 Table 27. Status read out value If a readout is made, the R/W bit must be logic 1 and then the next data byte following is provided by the PCF8545 as shown in Figure 31. PCF8545 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 2 — 4 October 2021 39 / 68 |
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