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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SP485 датащи(PDF) 6 Page - Shanghai Leiditech Electronic Technology Co., Ltd |
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SP485 датащи(HTML) 6 Page - Shanghai Leiditech Electronic Technology Co., Ltd |
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6 / 10 page  Continued from the previous page.... Infinite slope function Drive input to input Out of the delay tDPLH RDIFF=54 Ω,CL1=CL2=100pF(2) 34 60 ns Drive input to input Out of the delay tDPHL 34 60 |tDPLH-tDPHL| tDSKEW -2.5 ns Drive up and down Time tDR, tDF 14 25 ns Maximum data transfer rate fMAX 2 Mbps Drive enable delay tDZH CL=100pF,S2 CLOSED(3) 150 ns Drive enable delay tDZL CL=100pF,S1 CLOSED(3) 150 ns Drive shutdown delay tDLZ CL=15pF,S1 CLOSED(3) 100 ns Drive shutdown delay tDHZ CL=15pF,S2 CLOSED(3) 100 ns Receiver input and output Delay tRPLH | VID|≥2.0V Rise and fall time ≤ 15ns(4). 106 150 ns Receiver input and output Delay tRPHL 106 150 ns |tRPLH-tRPHL| tRSKD | VID|≥2.0V Rise and fall time ≤ 15ns(4). 0 ±10 ns Receiver enable delay tRZL CL=100pF,S1 CLOSED(5) 20 50 ns Receiver enable delay tRZH CL=100pF,S2 CLOSED(5) 20 50 ns Receiver shutdown delay tRLZ CL=100pF,S1 CLOSED(5) 20 50 ns Receiver shutdown delay tRHZ CL=100pF,S2 CLOSED(5) 20 50 ns Shutdown mode enable time tSHDN 50 200 600 ns Drive wake delay tDZH(SHDN) CL=15pF,S2 CLOSED(3) 250 ns Drive wake delay tDZL(SHDN) CL=15pF,S1 CLOSED(3) 250 ns Receiver wake-up delay tRZH(SHDN) CL=100pF,S2 CLOSED(5) 3500 ns Receiver wake-up delay tRZL(SHDN) CL=100pF,S1 CLOSED(5) 3500 ns concentrate: (1) The test circuit is shown in Figure 1 (2) The test line is shown in Figure 2 (3) The test circuit is shown in Figure 3 (4) The test circuit is shown in Figure 4 (5) The test line is shown in Figure 5 PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS RDIFF=54 Ω,CL1=CL2=100pF(2) RDIFF=54 Ω,CL1=CL2=100pF(2) RDIFF=54 Ω,CL1=CL2=100pF(2) SP485 www.leiditech.com Rev 1.6 :01.01.2022 6/10 ±10 |
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