STM32F730X8 datasheet(22/202 Pages) STMICROELECTRONICS

22 / 202 page

Functional overview

STM32F730x8

22/202

DS12536 Rev 2

3.3

Embedded Flash memory

The STM32F730x8 devices embed a Flash memory of 64 Kbytes available for storing

programs and data.

The flexible protections can be configured thanks to option bytes:

•

Readout protection (RDP) to protect the whole memory. Three levels are available:

–

Level 0: no readout protection

–

Level 1: No access (read, erase, program) to the Flash memory or backup SRAM

can be performed while the debug feature is connected or while booting from RAM

or system memory bootloader

–

Level 2: debug/chip read protection disabled.

•

Write protection (WRP): the protected area is protected against erasing and

programming.

•

Proprietary code readout protection (PCROP): Flash memory user sectors (0 to 1) can

be protected against D-bus read accesses by using the proprietary readout protection

(PCROP). The protected area is execute-only.

3.4

CRC (cyclic redundancy check) calculation unit

The CRC (cyclic redundancy check) calculation unit is used to get a CRC code using a

configurable generator polynomial value and size.

Among other applications, CRC-based techniques are used to verify data transmission or

storage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a means of

verifying the Flash memory integrity. The CRC calculation unit helps compute a signature of

the software during runtime, to be compared with a reference signature generated at link-

time and stored at a given memory location.

3.5

Embedded SRAM

All the devices feature:

•

System SRAM up to 256 Kbytes:

–

SRAM1 on AHB bus Matrix: 176 Kbytes

–

SRAM2 on AHB bus Matrix: 16 Kbytes

–

DTCM-RAM on TCM interface (Tighly Coupled Memory interface): 64 Kbytes for

critical real-time data.

•

Instruction RAM (ITCM-RAM) 16 Kbytes:

–

It is mapped on TCM interface and reserved only for CPU Execution/Instruction

useful for critical real-time routines.

The Data TCM RAM is accessible by the GP-DMAs and peripheral DMAs through the

specific AHB slave of the CPU.The instruction TCM RAM is reserved only for CPU. It is

accessed at CPU clock speed with 0 wait states.

•

4 Kbytes of backup SRAM

This area is accessible only from the CPU. Its content is protected against possible

unwanted write accesses, and is retained in Standby or VBAT mode.

STM32F730X8 датащи(PDF) 22 Page - STMicroelectronics

STM32F730X8 датащи(HTML) 22 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL