1.

Pin Configuration

The TA100 device comes in three package configuration options based on the desired I/O interface. These include:

• SPI only interface in 8-pin SOIC

Based on the configuration selected, different GPIO options are available.

1.1

SOIC-8 Pinout with SPI Interface

The 8-pin SOIC SPI interface consists of the four SPI signals, a Reset signal and GPIO_3.

Table 1-1. 8-Pin SOIC SPI Pin Configuration

Pin Name

Pin Number

Function

CS

1

Chip Select for SPI

RESET

2

Reset Input, active low

GPIO_3

3

GPIO_3

4

Ground

SI

5

SPI Serial Data Input

SCK

6

SPI Clock

SO

7

SPI Serial Data Output

8

2.7V-5.5V Power Supply

Figure 1-1. Pinout

1

2

3

4

SI

SCK

5

SO

6

7

8

CS

GPIO_3

RESET

SPI I/O

RESET

GPIO

Pwr/Gnd

1.2

Pin Name

Pin Number

Function

GPIO_1

1

GPIO_1

GPIO_2

2

GPIO_2

GPIO_3

3

GPIO_3

4

Ground

TA100 (B5)

Pin Configuration

and its subsidiaries

Summary Datasheet

DS20006369C-page 4