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SN74HCS541 датащи(PDF) 14 Page - Texas Instruments |
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SN74HCS541 датащи(HTML) 14 Page - Texas Instruments |
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14 / 33 page ![]() 10 Power Supply Recommendations The power supply can be any voltage between the minimum and maximum supply voltage rating located in the Recommended Operating Conditions. Each VCC terminal should have a good bypass capacitor to prevent power disturbance. A 0.1-μF capacitor is recommended for this device. It is acceptable to parallel multiple bypass caps to reject different frequencies of noise. The 0.1-μF and 1-μF capacitors are commonly used in parallel. The bypass capacitor should be installed as close to the power terminal as possible for best results, as shown in given example layout image. 11 Layout 11.1 Layout Guidelines When using multiple-input and multiple-channel logic devices inputs must not ever be left floating. In many cases, functions or parts of functions of digital logic devices are unused; for example, when only two inputs of a triple-input AND gate are used or only 3 of the 4 buffer gates are used. Such unused input pins must not be left unconnected because the undefined voltages at the outside connections result in undefined operational states. All unused inputs of digital logic devices must be connected to a logic high or logic low voltage, as defined by the input voltage specifications, to prevent them from floating. The logic level that must be applied to any particular unused input depends on the function of the device. Generally, the inputs are tied to GND or VCC, whichever makes more sense for the logic function or is more convenient. 11.2 Layout Example 0.1 F Bypass capacitor placed close to the device Avoid 90° corners for signal lines Recommend GND flood fill for improved signal isolation, noise reduction, and thermal dissipation Unused input tied to GND VCC 2A1 Unused output left floating GND 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 1OE 2OE 1Y1 2A4 1Y2 2A3 1Y3 2A2 1Y4 1 20 10 11 2 3 4 5 6 7 8 9 12 13 14 15 16 17 18 19 GND V CC GND Figure 11-1. Example layout for the SN74HCS541-Q1 in the WRKS Package SN74HCS541-Q1 SCLS859 – NOVEMBER 2021 www.ti.com 14 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: SN74HCS541-Q1 |
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