| поискавой системы для электроныых деталей |
|
LP8733 датащи(PDF) 49 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
LP8733 датащи(HTML) 49 Page - Texas Instruments |
|
49 / 84 page ![]() 7.6.1.16 LDO1_DELAY LDO1_DELAY is shown in Table 7-39, Address: 0x0F Table 7-38. LDO1_DELAY Register D7 D6 D5 D4 D3 D2 D1 D0 LDO1_SHUTDOWN_DELAY[3:0] LDO1_STARTUP_DELAY[3:0] Table 7-39. LDO1_DELAY Register Field Descriptions Bits Field Type Default Description 7:4 LDO1_ SHUTDOWN_ DELAY[3:0] R/W X Shutdown delay of the LDO1 from the EN signal's falling edge: 0x0 - 0 ms 0x1 - 0.5 ms (1 ms if SHUTDOWN_DELAY_SEL=1 in the CONFIG register.) ... 0xF - 7.5 ms (15 ms if SHUTDOWN_DELAY_SEL=1 in the CONFIG register.) 3:0 LDO1_ STARTUP_ DELAY[3:0] R/W X Startup delay of the LDO1 from the EN signal's rising edge: 0x0 - 0 ms 0x1 - 0.5 ms (1 ms if STARTUP_DELAY_SEL=1 in the CONFIG register.) ... 0xF - 7.5 ms (15 ms if STARTUP_DELAY_SEL=1 in the CONFIG register.) 7.6.1.17 GPO_DELAY GPO_DELAY is shown in Table 7-41, Address: 0x10 Table 7-40. GPO_DELAY Register D7 D6 D5 D4 D3 D2 D1 D0 GPO_SHUTDOWN_DELAY[3:0] GPO_STARTUP_DELAY[3:0] Table 7-41. GPO_DELAY Register Field Descriptions Bits Field Type Default Description 7:4 GPO_ SHUTDOWN_ DELAY[3:0] R/W X Delay for the GPO falling edge from the EN signal's falling edge: 0x0 - 0 ms 0x1 - 0.5 ms (1 ms if SHUTDOWN_DELAY_SEL=1 in the CONFIG register) ... 0xF - 7.5 ms (15 ms if SHUTDOWN_DELAY_SEL=1 in the CONFIG register) 3:0 GPO_ STARTUP_ DELAY[3:0] R/W X Delay for the GPO rising edge from the EN signal's rising edge: 0x0 - 0 ms 0x1 - 0.5 ms (1 ms if STARTUP_DELAY_SEL=1 in the CONFIG register.) ... 0xF - 7.5 ms (15 ms if STARTUP_DELAY_SEL=1 in the CONFIG register.) 7.6.1.18 GPO2_DELAY GPO2_DELAY is shown in Table 7-43, Address: 0x11 Table 7-42. GPO2_DELAY Register D7 D6 D5 D4 D3 D2 D1 D0 GPO2_SHUTDOWN_DELAY[3:0] GPO2_STARTUP_DELAY[3:0] Table 7-43. GPO2_DELAY Register Field Descriptions Bits Field Type Default Description 7:4 GPO2_ SHUTDOWN_ DELAY[3:0] R/W X Delay for the GPO2 falling edge from the EN signal's falling edge: 0x0 - 0 ms 0x1 - 0.5 ms (1 ms if SHUTDOWN_DELAY_SEL=1 in the CONFIG register.) ... 0xF - 7.5 ms (15 ms if SHUTDOWN_DELAY_SEL=1 in the CONFIG register.) www.ti.com LP8733 SNVSBK2A – SEPTEMBER 2019 – REVISED JUNE 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 49 Product Folder Links: LP8733 |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |