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CGS700V датащи(PDF) 5 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
номер детали CGS700V
подробное описание детали  Commercial Low Skew PLL 1 to 9 CMOS Clock Driver
PDF  6 Pages
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производитель  NSC [National Semiconductor (TI)]
домашняя страница  http://www.national.com
Logo NSC - National Semiconductor (TI)

CGS700V датащи(HTML) 5 Page - National Semiconductor (TI)

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CGS700 (Continued)
Note 1
trise and tfall parameters are measured at the pin of the device
Note 2
Skew is measured at 50% of VCC for CLK1 and CLK2 while it is measured
14V for CLK4 Limits are guaranteed by design
Note 3
Output duty cycle is measured at VDD 2 for CLK1 and CLK2 while it is measured
14V for CLK4 Limits are guaranteed by design
Note 4
Jitter parameter is characterized and is guaranteed by design only It measures the uncertainty of either the positive or the negative edge over 1000
cycles It is also measured at output levels of VCC 2 Refer to Figure 2 for further explanation
Note 5
The GNDA pins of the 700 must be as free of noise as possible for minimum jitter Separate analog ground plane is recommended for the PCB
Also the VCCA pin requires extra filtering to further reduce noise Ferrite beads for filtering and bypass capacitors are suggested for VCCA pin
TLF11955 – 5
TLF11955 – 6
TLF11955 – 7
FIGURE 1 Waveforms
TLF11955 – 8
Jitter e
lPeriod(1) b Period(na1)l e 300 ps for either the rising or falling edge where n is 1 to 1000 cycles
FIGURE 2 Jitter
Application References and Bibliography
Information relating to EMI as well as general application issues are in the following application notes
AN-988EMI App Note
AN-640
AN-991
http
www nationalcom
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