11 Layout

11.1 Layout Guidelines

The image below illustrates an example of a PCB layout with the TMUX7462F. Some key considerations are:

the capacitor voltage rating is sufficient for the supplies.

• Multiple decoupling capacitors can be used if their is a lot of noise in the system. For example, a 0.1-µF and

1-µF can be placed on the supply pins. If multiple capacitors are used, placing the lowest value capacitor

closest to the supply pin is recommended.

• Keep the input lines as short as possible.

• Use a solid ground plane to help distribute heat and reduce electromagnetic interference (EMI) noise pickup.

• Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if

possible, and only make perpendicular crossings when necessary.

11.2 Layout Example

VFN

D1

S1

VSS

D2

S2

TMUX7462F

VDD

VFP

FF

S3

D3

N.C.

GND

S4

D4

DR

Wide (low inductance)

trace for VSS

Wide (low inductance)

trace for VDD

Via to ground plane

To Pull-up resistor

C

To VFP supply

C

To VFN supply

Figure 11-1. TSSOP Layout Example

S1

S2

VSS

VDD

GND

FF

S4

S3

C

C

Via to ground plane

Via to power plane

To Pull-up resistor

C

Figure 11-2. WQFN Layout Example

TMUX7462F

SCDS394A – MARCH 2021 – REVISED OCTOBER 2021

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