TMUX7308F datasheet(23/40 Pages) TI

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8 Detailed Description

8.1 Overview

The TMUX7308F and TMUX7309F are a modern complementary metal-oxide semiconductor (CMOS) analog

multiplexers in 8:1 (single ended) and 4:1 (differential) configurations. The devices work well with dual supplies

(±5 V to ±22 V), a single supply (8 V to 44 V), or asymmetric supplies (such as VDD = 15 V, VSS = –5 V). The

devices have an overvoltage protection feature on the source pins under powered and powered-off conditions,

allowing them to be used in harsh industrial environments.

8.2 Functional Block Diagram

VDD

VSS

TMUX7308F

Fault Detection/

Switch Driver/

Logic Decoder

S1A

TMUX7309F

Fault Detection/

Switch Driver/

Logic Decoder

S4A

S1B

S4B

VDD

VSS

8.3 Feature Description

8.3.1 Flat On – Resistance

The TMUX7308F and TMUX7309F are designed with a special switch architecture to produce ultra-flat on-

resistance (RON) across most of the switch input operation region. The flat RON response allows the device to

be used in precision sensor applications since the RON is controlled regardless of the signals sampled. The

architecture is implemented without a charge pump so no unwanted noise is produced from the device to affect

sampling accuracy.

8.3.2 Protection Features

The TMUX7308F and TMUX7309F offer a number of protection features to enable robust system

implementations.

8.3.2.1 Input Voltage Tolerance

The maximum voltage that can be applied to any source input pin is +60 V or -60 V, allowing the device to

handle typical voltage fault conditions in industrial applications. It shall be cautioned that the device is rated to

handle maximum stress of 85 V across different pins, such as the following:

1. Between the source pins and supply rails:

For example, if the device is powered by VDD supply of 20 V, then the maximum negative signal level on any

source pin is –60 V to maintain the 60 V maximum rating on any source pin. If the device is powered by VDD

supply of 40 V, then the maximum negative signal level on any source pin is reduced to –45 V to maintain

the 85 V maximum rating across the source pin and the supply.

2. Between the source pins and one or more drain pins:

For example, if channel S1 is ON and the voltage on S1(A) pin is 40 V. In this case, the drain voltage is

also 40 V. The maximum negative voltage on any of the other source pins is –45 V to maintain the 85 V

maximum rating across the source pin and the drain pin.

www.ti.com

TMUX7308F

SCDS403A – FEBRUARY 2021 – REVISED OCTOBER 2021

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