¡ Semiconductor

ML7005

19/24

FUNCTIONAL DESCRIPTION

Oscillation Circuit

The X1 and X2 should be connected by a 3.579545 MHz crystal.

When the load capacitance of the crystal is 16pF, X1 and GND should be connected by a 20 pF

capacitor, and X2 and GND also should be connected by a 20 pF capacitor.

If necessary, an external clock should be input to X1 via a 1000 pF capacitor, and X2 should be

left open.

Figure 6 Crystal Connection

Figure 7 External Clock Connection

DTMF Receiver, CPT Detector Input Level Adjustment

Adjust the input level according to the method shown in the figure 8.

Determine the value of a usable resistor so that the levels of the outputs (DTIO, CPDIO) of each

amplifier at a maximum input level are less than the maximum detect level described in the AC

Characteristics.

X1

X2

C1

3.579545MHz

C2

X1

X2

3.579545MHz

Figure 8 DTMF, CPT Input Level Adjustment

+

–

DTRIO

DTRIM

CA

IN

DTRIP

(CPDIM)

(CPDIP)

(CPDIO)

SG

CA ≥ 0.1 mF

Gain = 1 +

£ 10

–

+

DTRIP

CA

IN

DTRIM

(CPDIP)

(CPDIM)

SG

Gain =

£ 10

DTRIO

(CPDIO)