ML2250 datasheet(15/36 Pages) OKI

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FEDL2250DIGEST-09

OKI Semiconductor

ML2250 family

15/36

Symbol

Type

Description

D6/SCK

I/O

Works as CPU interface data bus pin in parallel input interface.

Works as flash memory data output pin when reading the built-in flash

memory data.

When RD is at

“L” level other than when reading the flash memory data,

this D6/SCK pin usually outputs

“L” level.

Works as serial clock input pin in the serial input interface.

When the SCK input is at

“L” level on the falling edge of WR, RD, DW,

the DI input is captured in device on the rising edge of SCK clock. And

when the SCK input is at

“H” level on the falling edge of CS, the DI input

is captured on the falling edge of SCK clock.

D7/DI

I/O

Works as CPU interface data bus pin in the parallel input interface.

Works as flash data output pin when reading the built-in flash memory

data.

When RD is at

“L” level at times other than reading the flash memory

data, this D7/DI pin usually outputs

“L” level.

Works as serial data input pin in the serial input interface.

DAO

DAO pin outputs the 14-bit DAC analog signal.

AOUT

AOUT pin outputs the 14-bit DAC analog signal via voltage follower.

SERIAL

CPU interface switching pin.

“H” level: Serial input interface. At “L” level: Parallel input interface.

CPU interface chip select pin.

When CS pin is at

“H” level, the WR, DW, and RD signals cannot be input

to the device.

OPTANA

Keep this pin

“L” level. 14-bit DAC analog signal is output from DAO pin

and 14-bit DAC analog signal is output from AOUT pin via the voltage

follower.

CPU interface write signal.

When CS pin is at

“H” level, the WR signal cannot be input to the device.

Data write signal at EXT command and Flash I/F command.

When the EXT and Flash I/F commands are not used, keep this pin at

“H” level.

When CS pin is at

“H” level, the DW signal cannot be input to the device.

This pin has a pull-up resistor built in.

CPU interface read signal.

This pin is used when reading the status signal of each channel or when

reading data of the built-in flash memory.

When not in use, keep this pin to

“H” level.

This pin has a pull-up resistor built in.

TESTO

Output pin for testing.

Keep this pin open.

RD/BY

Output pin to indicate the automatic erase/write status of the built-in

flash memory.

Outputs

“L” level during erase or programming cycle to indicate the

busy state. Goes to

“H” level at the end of the erase or programming

cycle and enters into the ready state.

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