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LTC4366 датащи(PDF) 9 Page - Analog Devices |
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LTC4366 датащи(HTML) 9 Page - Analog Devices |
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9 / 32 page ![]() LTC7862 9 Rev 0 For more information www.analog.com SS (Pin 1/Pin 3): Soft-Start Input. The LTC7862 attempts to regulate the VFB voltage to the smaller of 0.8V or the voltage on the SS pin. An internal 10μA pull-up current source is connected to this pin. A capacitor to ground at this pin sets the ramp time to final regulated output volt- age during startup or during a retry. VFB (Pin 2/Pin 4): Feedback Input. This pin receives the remotely sensed feedback voltage from an external resis- tor divider across the output. ITH (Pin 3/Pin 5): Error Amplifier Output and Switching Regulator Compensation Point. The current comparator trip point increases with this control voltage. TMR (Pin 4/Pin 6): Programmable Fault Timer Input. A timing capacitor CTMR, connected between this pin and GND, sets the amount of time that can be spent switching (during an overvoltage, overcurrent, and/or startup condi- tion.) It also sets the cool-down time before the LTC7862 will retry. See Applications Information. FREQ (Pin 5/Pin 7): Frequency Control Pin for the Internal VCO. Connecting the pin to GND forces the VCO to a fixed low frequency of 350kHz. Connecting the pin to INTVCC forces the VCO to a fixed high frequency of 535kHz. Other frequencies between 50kHz and 900kHz can be pro- grammed by using a resistor between FREQ and GND. An internal 20µA pull-up current develops the voltage to be used by the VCO to control the frequency. WARNB (Pin 6/Pin 8): Open-Drain Logic Output. This pin pulls low to GND whenever the LTC7862 is switch- ing (during an overvoltage, overcurrent, and/or startup condition.) The typical pull-down impedance is 10Ω. The WARNB pin enters a high-impedance state 60µs after LTC7862 enters dropout with the top external MOSFET on continuously. The WARNB pin is also pulled low during shutdown and during the cool-down period before a retry. TG (Pin 7/Pin 9): High Current Gate Drive for Top N-Channel MOSFET. This is the output of the floating high side driver with a voltage swing from SW to BOOST. SW (Pin 8/Pin 10): Switch Node Connection to Inductor. BOOST (Pin 9/Pin 11): Bootstrapped Supply to the Topside Floating Driver. A capacitor is connected between the BOOST and SW pins and an external low leakage diode is tied between the BOOST and DRVCC pins. Voltage swing at the BOOST pin is from approximately DRVCC to (VIN + DRVCC). When TG is statically on during normal opera- tion, BOOST is approximately 9V above SW. BG (Pin 10/Pin 12): High Current Gate Drive for Bottom (Synchronous) N-Channel MOSFET. Voltage swing at this pin is from ground to DRVCC. GND (Pin 11, Exposed Pin 21/Pin 13, Exposed Pad Pin 21): Ground. All GND pins must be tied together for oper- ation. The exposed pad must be soldered to PCB ground for rated electrical and thermal performance. DRVCC (Pin 12/Pin 14): Output of the VIN or EXTVCC Low Dropout Regulators. The gate drivers are powered from this voltage source. The DRVCC voltage is set by the DRVUV pin. Must be decoupled to ground with a mini- mum of 4.7µF ceramic or other low ESR capacitor, as close as possible to the IC. Do not use the DRVCC pin for any other purpose. VIN (Pin 13/Pin 15): Main Supply Pin. A bypass capacitor should be tied between this pin and GND. EXTVCC (Pin 14/Pin 16): External Power Input to an Internal LDO linear regulator Connected to DRVCC. This LDO supplies DRVCC power from EXTVCC, bypassing the internal LDO powered from VIN whenever EXTVCC is higher than its switchover threshold (4.7V or 7.7V depending on the DRVUV pin). See DRVCC Regulators in the Applications Information section. Do not exceed 14V on this pin. Do not connect EXTVCC to a voltage greater than VIN. RUN (Pin 15/Pin 17): Run Control Input. Forcing this pin below 1.12V shuts down the controller. Forcing this pin below 0.7V shuts down the entire LTC7862, reducing qui- escent current to approximately 10µA. This pin can be tied to VIN for always-on operation. Do not float this pin. PIN FUNCTIONS (QFN/TSSOP) |
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