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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SH7041A датащи(PDF) 304 Page - Renesas Technology Corp |
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SH7041A датащи(HTML) 304 Page - Renesas Technology Corp |
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304 / 923 page  266 11.4.2 Example of DMA Transfer between External RAM and External Device with DACK In this example, an external request, serial address mode transfer with external memory as the transfer source and an external device with DACK as the transfer destination is executed using DMAC channel 1. Table 11.8 indicates the transfer conditions and the setting values of each of the registers. Table 11.8 Transfer Conditions and Register Set Values for Transfer between External RAM and External Device with DACK Transfer Conditions Register Value Transfer source: external RAM SAR1 H'00400000 Transfer destination: external device with DACK DAR1 (access by DACK) Transfer count: 32 times DMATCR1 H'00000020 Transfer source address: decremented CHCR1 H'00002269 Transfer destination address: (setting ineffective) Transfer request source: external pin ( DREQ1) edge detection Bus mode: burst Transfer unit: word No interrupt request generation at end of transfer Channel priority ranking: 2 > 0 > 1 > 3 DMAOR H'0201 11.4.3 Example of DMA Transfer between A/D Converter and On-Chip Memory (Address Reload On) (Excluding A Mask) In this example, the on-chip A/D converter channel 0 is the transfer source and on-chip memory is the transfer destination, and the address reload function is on. Table 11.9 indicates the transfer conditions and the setting values of each of the registers. |
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