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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ZLP12840 датащи(PDF) 47 Page - Zilog, Inc. |
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ZLP12840 датащи(HTML) 47 Page - Zilog, Inc. |
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47 / 58 page  PS024406-0106 P R E L I M I N A R Y Program Memory Paging Register ZLP12840 OTP MCU Product Specification 36 Program Memory Paging Register Bit 0 of the Program Memory Paging Register determines which 64KB bank of program memory is read during the execution of the LDC and LDCI instructions. See Table 16. Table 16. Program Memory Paging Register (PMPR) Bit 7 6 5 4 3 2 1 0 Field Page Toggle Enable Reserved Page Register Reset 0 XX X XX X0 R/W R/W R/W Address Bank Independent: F0h; Linear: 0F0h Bit Position Value Description [7] 0 1 Page Toggle Enable PMPR[0] changes only when written by software. If PMPR[0]=0, the CPU toggles PMPR[0] when LDCI increments past FFFFh. [6:1] ReservedReads 111111b; write 000000b for compatibility with possible future devices. [0] 0 1 Page Register LDC, LDCI instructions access Page 0. LDC, LDCI instructions access Page 1. |
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