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STE2007DIE2 датащи(PDF) 13 Page - STMicroelectronics

номер детали STE2007DIE2
подробное описание детали  96 x 68 Single Chip LCD Controller/Driver
PDF  62 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STE2007DIE2 датащи(HTML) 13 Page - STMicroelectronics

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STE2007
3 Display Driver Electrical Characteristics
13/62
Table 11.
Input Signals Change Time
3.4.1
Driver TxData Mode
Table 12.
Timings based on 4 MHz SCLK Speed
Note: 1 Data Hold Time T1 depends on SCLK high time and Max Data Hold time. It is Always 3-8ns
before SCLK pulse falling edge
2 The input signal rise and fall times must be within 10ns.
3 Every timing is specified on the basis of 30% and 70% of VDDI.
4Tamb = -40 to 85°C, unless otherwise specified.
Table 13.
Timings based on 1 MHz SCLK Speed
Note: 1 The input signal rise and fall times must be within 10ns.
2 Every timing is specified on the basis of 30% and 70% of VDDI.
3Tamb = -40 to 85°C, unless otherwise specified.
Signal
Symbol
Parameter
Minimum
Typical/
Nominal
Maximum
Unit / Notes
Inputs
tr,tf
10
ns / to 30% & 70% levels
Item
Symbol
Condition
Rating
Units
Min.
Max.
Data hold time
T1
Note 1
100
125
ns
Access time
T2
–
10
100
ns
Output disable time
T3
–
25
100
ns
Data setup time
T4
–
100
–
ns
!CS pulse width high
T5
–
250
ns
Item
Symbol
Condition
Rating
Units
Min.
Max.
Data hold time *)
T1
–
100
125
ns
Access time
T2
–
10
450
ns
Output disable time
T3
–
25
450
ns
Data setup time
T4
–
100
–
ns
1CS pulse width high
T5
–
250
ns



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