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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AT90USB646 датащи(PDF) 83 Page - ATMEL Corporation |
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AT90USB646 датащи(HTML) 83 Page - ATMEL Corporation |
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83 / 434 page  83 7593A–AVR–02/06 AT90USB64/128 PCINT1, Pin Change Interrupt source 1: The PB7 pin can serve as an external interrupt source. •SS/PCINT0 – Port B, Bit 0 SS: Slave Port Select input. When the SPI is enabled as a slave, this pin is configured as an input regardless of the setting of DDB0. As a slave, the SPI is activated when this pin is driven low. When the SPI is enabled as a master, the data direction of this pin is controlled by DDB0. When the pin is forced to be an input, the pull-up can still be controlled by the PORTB0 bit. Table 10-7 and Table 10-8 relate the alternate functions of Port B to the overriding signals shown in Figure 10-5 on page 78. SPI MSTR INPUT and SPI SLAVE OUTPUT constitute the MISO signal, while MOSI is divided into SPI MSTR OUTPUT and SPI SLAVE INPUT. PCINT0, Pin Change Interrupt source 0: The PB7 pin can serve as an external interrupt source.. Table 10-7. Overriding Signals for Alternate Functions in PB7..PB4 Signal Name PB7/PCINT7/OC0A/ OC1C PB6/PCINT6/OC 1B PB5/PCINT5/OC 1A PB4/PCINT4/OC 2A PUOE 0 0 0 0 PUOV 0 0 0 0 DDOE 0 0 0 0 DDOV 0 0 0 0 PVOE OC0/OC1C ENABLE OC1B ENABLE OC1A ENABLE OC2A ENABLE PVOV OC0/OC1C OC1B OC1A OC2A DIEOE PCINT7 • PCIE0 PCINT6 • PCIE0 PCINT5 • PCIE0 PCINT4 • PCIE0 DIEOV 1 1 1 1 DI PCINT7 INPUT PCINT6 INPUT PCINT5 INPUT PCINT4 INPUT AIO – – – – Table 10-8. Overriding Signals for Alternate Functions in PB3..PB0 Signal Name PB3/PD0/PCINT3/ MISO PB2/PDI/PCINT2/ MOSI PB1/PCINT1/ SCK PB0/PCINT0/ SS PUOE SPE • MSTR SPE • MSTR SPE • MSTR SPE • MSTR PUOV PORTB3 • PUD PORTB2 • PUD PORTB1 • PUD PORTB0 • PUD DDOE SPE • MSTR SPE • MSTR SPE • MSTR SPE • MSTR DDOV 0 0 0 0 PVOE SPE • MSTR SPE • MSTR SPE • MSTR 0 PVOV SPI SLAVE OUTPUT SPI MSTR OUTPUT SCK OUTPUT 0 DIEOE PCINT3 • PCIE0 PCINT2 • PCIE0 PCINT1 • PCIE0 PCINT0 • PCIE0 DIEOV 1 1 1 1 DI SPI MSTR INPUT PCINT3 INPUT SPI SLAVE INPUT PCINT2 INPUT SCK INPUT PCINT1 INPUT SPI SS PCINT0 INPUT AIO – – – – |
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