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TBD датащи(PDF) 13 Page - Integrated Circuit Systems

номер детали TBD
подробное описание детали  FEMTOCLOCKS-TM 680MHZ, CRYSTAL-TO- 3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
PDF  20 Pages
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производитель  ICST [Integrated Circuit Systems]
домашняя страница  http://www.icst.com
Logo ICST - Integrated Circuit Systems

TBD датащи(HTML) 13 Page - Integrated Circuit Systems

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843020AY-01
www.icst.com/products/hiperclocks.html
REV. B APRIL 14, 2005
13
Integrated
Circuit
Systems, Inc.
ICS843020-01
FEMTOCLOCKS™ 680MHZ, CRYSTAL-TO-
3.3V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER
The schematic of the ICS843020-01 layout example used in
this layout guideline is shown in
Figure 5A. The ICS843020-
01 recommended PCB board layout for this example is shown
in
Figure 5B. This layout example is used as a general guide-
LAYOUT GUIDELINE
FIGURE 5A. SCHEMATIC OF RECOMMENDED LAYOUT
line. The layout in the actual system will depend on the se-
lected component types, the density of the components, the
density of the traces, and the stack up of the P.C. board.
C2
X1
Set Logic
Input to
'1'
'0'
C14
0.1u
S_LOAD
Set Logic
Input to
'0'
TL1
Zo = 50 Ohm
'1'
VCC
REF_IN
VCCA
RU1
1K
C15
0.1u
RU2
Not Install
VCC
C16
10u
To Logic
Input
pins
R7
10
C11
0.01u
RD1
Not Install
S_DATA
R3
133
C1
R1
133
R5
1K
U1
ICS843020-01
1
2
3
4
5
6
7
8
17
18
19
20
21
22
23
24
M5
M6
M7
M8
N0
N1
P_DIV
VEE
MR
S_CLOCK
S_DATA
S_LOAD
VCCA
nXTAL_SEL
T_CLK
XTAL_O
Float
VCC
S_CLOCK
To Logic
Input
pins
RD2
1K
R2
82.5
VCC
Logic Input Pin Examples
XTAL_SEL
+
-
R6
1K
R4
82.5
TL2
Zo = 50 Ohm
VCC



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