PIC16F684-ESLASHST datasheet(33/164 Pages) MICROCHIP

33 / 164 page

 2004 Microchip Technology Inc.

Preliminary

DS41202C-page 31

PIC16F684

4.0

I/O PORTS

There are as many as twelve general purpose I/O pins

available.

Depending

which

peripherals

are

enabled, some or all of the pins may not be available as

general purpose I/O. In general, when a peripheral is

enabled, the associated pin may not be used as a

general purpose I/O pin.

4.1

PORTA and the TRISA Registers

PORTA is a 6-bit wide, bidirectional port. The

corresponding

data

direction

TRISA

(Register 4-2). Setting a TRISA bit (= 1) will make the

corresponding PORTA pin an input (i.e., put the

corresponding output driver in a High-impedance

mode). Clearing a TRISA bit (= 0) will make the

corresponding PORTA pin an output (i.e., put the

contents of the output latch on the selected pin). The

exception is RA3, which is input only and its TRIS bit

will always read as ‘1’. Example 4-1 shows how to

initialize PORTA.

Reading the PORTA register (Register 4-1) reads the

status of the pins, whereas writing to it will write to the

port latch. All write operations are read-modify-write

operations. Therefore, a write to a port implies that the

port pins are read, this value is modified and then

written to the port data latch. RA3 reads ‘0’ when

MCLRE = 1.

The TRISA register controls the direction of the

PORTA pins, even when they are being used as analog

inputs. The user must ensure the bits in the TRISA

inputs. I/O pins configured as analog input always read

‘0’.

EXAMPLE 4-1:

INITIALIZING PORTA

4.2

Additional Pin Functions

Every PORTA pin on the PIC16F684 has an interrupt-

on-change option and a weak pull-up option. RA0 has

an Ultra Low-Power Wake-up option. The next three

sections describe these functions.

4.2.1

WEAK PULL-UPS

Each of the PORTA pins, except RA3, has an individu-

ally configurable internal weak pull-up. Control bits

WPUAx enable or disable each pull-up. Refer to

off when the port pin is configured as an output. The

pull-ups are disabled on a Power-on Reset by the

RAPU bit (OPTION_REG<7>). A weak pull-up is auto-

matically enabled for RA3 when configured as MCLR

and disabled when RA3 is an I/O. There is no software

control of the MCLR pull-up.

PORTA – PORTA REGISTER (ADDRESS: 05h)

Note:

Additional information on I/O ports may be

found in the “PICmicro® Mid-Range MCU

Family Reference Manual” (DS33023).

Note:

The ANSEL (91h) and CMCON0 (19h)

registers must be initialized to configure

an analog channel as a digital input. Pins

configured as analog inputs will read ‘0’.

BCF

STATUS,RP0

;Bank 0

CLRF

PORTA

;Init PORTA

MOVLW

07h

;Set RA<2:0> to

MOVWF

CMCON0

;digital I/O

BSF

STATUS,RP0

;Bank 1

CLRF

ANSEL

;digital I/O

MOVLW

0Ch

;Set RA<3:2> as inputs

MOVWF

TRISA

;and set RA<5:4,1:0>

;as outputs

BCF

STATUS,RP0

;Bank 0

U-0

R/W-x

R/W-0

—

RA5

RA4

RA3

RA2

RA1

RA0

bit 7

bit 0

bit 7-6:

Unimplemented: Read as ‘0’

bit 5-0:

RA<5:0>: PORTA I/O Pin bit

= Port pin is > VIH

= Port pin is < VIL

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

PIC16F684-E/ST датащи(PDF) 33 Page - Microchip Technology

PIC16F684-E/ST датащи(HTML) 33 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL