KSZ8863FLL datasheet(53/92 Pages) MICROCHIP

53 / 92 page

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2017-2021 Microchip Technology Inc.

DS00002335C-page 53

KSZ8863MLL/FLL/RLL

Hp_mdix

R/W

1 = HP Auto MDI/MDI-X mode

0 = Microchip Auto MDI/MDI-X mode

Note that only

ports 1 and 2

are PHY ports.

This bit is not

applicable to

port 3 (MII).

Reserved

Do not change the default value.

Polrvs

1 = polarity is reversed

0 = polarity is not reversed

Note that this bit

is not applica-

ble to port 3

(MII).

This bit is only

valid for 10BT

Transmit Flow

Control Enable

1 = transmit flow control feature is active

0 = transmit flow control feature is inactive

Receive Flow

Control Enable

1 = receive flow control feature is active

0 = receive flow control feature is inactive

Operation Speed

1 = link speed is 100 Mbps

0 = link speed is 10 Mbps

Operation Duplex

1 = link duplex is full

0 = link duplex is half

Far-End Fault

1 = far-end fault status detected

0 = no far-end fault status detected

This bit is

applicable to

port 1 only.

Software Reset

R/W

1 = Software reset

0 = Clear

Note:

Software reset will reset all registers to the

initial values of the power-on reset or

warm reset (keep the strap values).

PCS Reset

R/W

1 = PCS reset is used when is doing software reset

for a complete reset

0 = Clear

Note:

PCS reset will reset the state machine and

clock domain in PHY’s PCS layer.

TABLE 4-7:

PORT REGISTERS (REGISTERS 16-95) (CONTINUED)

Bit

Name

R/W

Description

Default

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